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Papers and Reports

2010

A. Blad and O. Gustafsson, "Integer Linear Programming-Based Bit-Level Optimization for High-Speed FIR Decimation Filter Architectures," Circuits, Systems and Signal Processing - Special Issue on Low Power Digital Filter Design Techniques and Their Applications, vol. 29, no. 1, pp. 81-101, Feb. 2010. doi: 10.1007/s00034-009-9116-5	[Abstract]	[pdf]

O. Gustafsson and F. Qureshi, "Addition aware quantization for low complexity and high precision constant multiplication," IEEE Signal Processing Letters, vol. 17, no. 2, pp. 173-176, Feb. 2010.

F. Qureshi and O. Gustafsson, "Twiddle Factor Memory Switching Activity Analysis of Radix-2^2 and Equivalent FFT Algorithms," IEEE Int. Symp. Circuits Syst., Paris, May 30-June 2, 2010.

A. Blad and O. Gustafsson, "Redundancy Reduction for High-Speed FIR Filter Architectures Based on Carry-Save Adder Trees," IEEE Int. Symp. Circuits Syst., Paris, May 30-June 2, 2010.

A. Eghbali, H. Johansson, and P. Löwenborg, "Reconfigurable nonuniform transmultiplexers based on uniform filter banks," IEEE Int. Symp. Circuits Syst., Paris, May 30-June 2, 2010.

M. Zheng, Z. Fei, X. Chen, J. Kuang and A. Blad, "Power Efficient Partial Repeated Cooperation Scheme with Regular LDPC Code," in Proc. Vehicular Tech. Conf. Spring, Taipei, May 16-19, 2010. (accepted)

2009

H. Johansson, “A polynomial-based time-varying filter structure for the compensation of frequency-response mismatch errors in time-interleaved ADCs,” IEEE J. Selected Topics in Signal Processing, special issue on DSP Techniques for RF/Analog Circuit Impairments, 2009 (accepted).

L. Rosenbaum, P. Löwenborg, and H. Johansson “Two classes of cosine-modulated IIR/IIR and IIR/FIR NPR filter banks,” Circuits, Syst., Signal Processing, Special issue on low power digital filter design techniques and their applications, 2009 (accepted).

A. Eghbali, H. Johansson, P. Löwenborg, and Heinz G. Göckler, "Dynamic frequency-band reallocation and allocation: from satellite-based communication systems to cognitive radios," J. Signal Processing Syst. - Special Issue on Signal Processing for Software Defined Radio, (accepted).

A. Eghbali, H. Johansson, and P. Löwenborg, “Flexible frequency-band reallocation: Complex versus real,” Circuits, Syst., Signal Processing, (accepted).

F. Qureshi and O. Gustafsson, "Analysis of Twiddle Factor Memory Complexity of Radix-2^i Pipelined FFTs," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.

O. Gustafsson and K. Johansson, "Techniques for Avoiding Sign-Extension in Multiple Constant Multiplication," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.

K. Johansson, L. DeBrunner, O. Gustafsson, and V. DeBrunner, "Design of Multiplierless FIR Filters with an Adder Depth Versus Filter Order Trade-Off," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.

A. Eghbali, H. Johansson, and P. Löwenborg, "On the filter design for a class of multimode transmultiplexers," in Proc. IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.

Z. Sheikh and H. Johansson, “Wideband linear-phase FIR differentiators utilizing multirate and frequncy-response masking techniques,” in Proc. IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24–27, 2009.

F. Qureshi and O. Gustafsson, "Low-complexity reconfigurable complex constant multiplication for FFTs," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.

M. Abbas, O. Gustafsson, and H. Johansson, "Scaling of fractional delay filters based on the Farrow structure," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.

K. Johansson, O. Gustafsson, and L. DeBrunner, "Estimation of the Switching Activity in Shift-and-Add Based Computations," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.

A. Havashki, L. Lundheim, P. G. Kjeldsberg, O. Gustafsson, G. E. Øien, "Analysis of switching activity in DSP signals in the presence of noise," in Proc. IEEE Eurocon, St. Petersburg, Russia, May 18-23, 2009.

2008

H. Johansson and P. Löwenborg, “A least-squares filter design technique for the compensation of frequency-response mismatch errors in time-interleaved A/D converters,” IEEE Trans. Circuits, Syst. II, vol. 55, no. 11. pp. 1154–1158, Nov. 2008.

E. Hermanowicz, H. Johansson, and M. A. Rojewski, “A fractionally delaying complex Hilbert transform filter,“ IEEE Trans. Circuits Syst. II, vol. 55, no. 5, pp. 452–456, May 2008.

O. Gustafsson, "Comments on `A 70 MHz multiplierless FIR Hilbert transformer in 0.35 um standard CMOS library'," IEICE Trans. Fundamentals, vol. E91-A, no. 3, Mar. 2008.

A. Eghbali, H. Johansson, and P. Löwenborg, "A multimode transmultiplexer structure," IEEE Trans. Circuits Syst. II - Special Issue on Multifunctional Circuits and Systems for Future Generations of Wireless Communications, vol. 55, no. 3, pp. 279-283, Mar. 2008.

K. Johansson, O. Gustafsson, and L. Wanhammar, "Implementation of elementary functions for logarithmic number systems," IET Computers and Digital Techniques: Special issue for Norchip 2006, vol. 2, no. 4, pp. 295-304, July 2008.

A. Blad, H. Johansson, P. Löwenborg, "Multirate Formulation for Mismatch Sensitivity Analysis of Analog-to-Digital Converters That Utilize Parallel Sigma-Delta Modulators," EURASIP Journal on Advances in Signal Processing, vol. 2008, Article ID 289184, 11 pages, 2008. doi:10.1155/2008/289184	[Abstract]	[pdf]

M. Abbas, F. Qureshi, H. Johansson, “On the compensation of frequency-response mismatch errors in time-interleaved ADCs,“ in Proc. Int. Conf. Microelectronics, Sharja, UEA, Dec. 2008, (invited paper).

M. Abbas, F. Qureshi, Z. Sheikh, O. Gustafsson, H. Johansson, and K. Johansson, "Comparison of multiplierless implementation of nonlinear-phase versus linear-phase FIR filters," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.

E. Lindahl and O. Gustafsson, "Architecture-aware design of a decimation filter based on a dual wordlength multiply-accumulate unit," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.

O. Gustafsson, "Towards optimal multiple constant multiplication: a hypergraph approach," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.

O. Gustafsson and K. Johansson, "An empirical study on standard cell synthesis of elementary function look-up tables," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.

L. Wanhammar, B. Soltanian, O. Gustafsson, and K. Johansson, "Synthesis of Bandpass Circulator-Tree Wave Digital Filters," IEEE Int. Conf. on Electronics, Circuits and Systems, Malta, Aug. 31-Sept. 3, 2008.

A. Eghbali, H. Johansson, and P. Löwenborg, "A Farrow-structure-based multi-mode transmultiplexer," in Proc. IEEE Int. Symp. Circuits Syst.,Seattle, Washington, USA, May. 18-21, 2008.

S. Tahmasbi Oskuii, K. Johansson, O. Gustafsson, and P. G. Kjeldsberg, "Power optimization of weighted bit-product summation tree for elementary function generator," IEEE Int. Symp. Circuits Syst.,Seattle, WA, USA, May. 18-21, 2008.

K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity estimation for shift-and-add based constant multipliers," IEEE Int. Symp. Circuits Syst.,Seattle, WA, USA, May. 18-21, 2008.

A. Blad and O. Gustafsson, "Bit-level optimized high-speed architectures for decimation filter applications," IEEE Int. Symp. Circuits Syst.,Seattle, WA, USA, May. 18-21, 2008.

U. Meyer-Bäse, O.Gustafsson, and A. Dempster, "The Canonical Minimised Adder Graph Representation," in Proceedings SPIE, May 2008.

2007

O.Gustafsson, "Lower bounds for constant multiplication problems," IEEE Trans. Circuits Syst. II, vol. 54, no. 11, pp. 974-978, Nov. 2007.

E. Hermanowicz and H. Johansson, "A complex variable fractional delay FIR filter structure," IEEE Trans. Circuits, Syst. II, vol. 54, no. 9, pp. 785–789, Sept. 2007.

L. Rosenbaum, P. Löwenborg, and H. Johansson, "An approach for synthesis of modulated M-channel FIR filterbanks utilizing the frequency-response masking technique," EURASIP Journal on Advances in Signal Processing, vol. 2007, Article ID 68285, 13 pages, 2007. doi: 10.1155/2007/68285.	[Abstract]	[pdf]

H. Johansson and P. Löwenborg, "Flexible frequency-band reallocation network using variable oversampled complex-modulated filter banks," EURASIP Journal on Advances in Signal Proc., vol. 2007, Article ID 63714, 15 pages, 2007. doi: 10.1155/2007/63714.	[Abstract]	[pdf]

K.Johansson, O. Gustafsson, and L. Wanhammar, "Bit-Level Optimization of Shift-and-Add Based FIR Filters," IEEE Int. Conf. Elec. Circuits Syst., Marrakech, Marocco, Dec. 11-14, 2007.

S. Tahmasbi Oskuii, P. G. Kjeldsberg, and O. Gustafsson, "A method for power optimized partial product reduction in parallel multipliers," IEEE Norchip Conf., Aalborg, Denmark, Nov.19-20, 2007.

O. Gustafsson, L. S. DeBrunner, V. DeBrunner, and H. Johansson, "On the design of sparse half-band like FIR filters," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 4-7, 2007.

L. Wanhammar and O. Gustafsson (Plenary lecture), "Energy-Aware DSP Algorithm Design," 5th Int. Symp. Image, Signal Processing, Analysis (ISPA 2007), Istanbul, Turkey, Sept. 27-29, 2007.

O. Gustafsson and L. Wanhammar, "Low-complexity constant multiplication using carry-save arithmetic for high-speed digital filters," Int. Symp. Image, Signal Processing, Analysis, Istanbul, Turkey, Sept. 27-29, 2007.

L. Wanhammar, B. Soltanian, K. Johansson, and O. Gustafsson, "Synthesis of circulator-tree wave digital filters," Int. Symp. Image, Signal Processing, Analysis, Istanbul, Turkey, Sept. 27-29, 2007.

A. Eghbali, O. Gustafsson, H. Johansson, and P. Löwenborg, "On the complexity of multiplierless direct and polyphase FIR filter structures," Int. Symp. Image, Signal Processing, Analysis, Istanbul, Turkey, Sept. 27-29, 2007.

A. Eghbali, H. Johansson, and P. Löwenborg, "Flexible frequency-band reallocation MIMO networks for real signals," Int. Symp. Image, Signal Processing, Analysis, Istanbul, Turkey, Sept. 27-29, 2007.

O. Gustafsson, S. T. Oskuii, K. Johansson, and P. G. Kjeldsberg, "Switching activity reduction of MAC-based FIR filters with correlated input data," Int. Workshop on Power and Timing Modeling, Optimization and Simulation, Gothenburg, Sweden, Sept. 3-5, 2007.

E. Backenius, M. Vesterbacka, and V.B. Settu, "Reduction of simultaneous switching noise in analog signal band," IEEE European Conf. Circuit Theory Design, ECCTD'07, Seville, Spain, Aug. 26-30, 2007.

E. Säll and M. Vesterbacka, "Thermometer-to-binary decoders for flash analog-to-digital converters," IEEE European Conf. Circuit Theory Design, ECCTD'07, Seville, Spain, Aug. 26-30, 2007.

M. Olsson, H. Johansson, and P. Löwenborg, "Simultaneous Estimation of Gain, Delay, and Offset Utilizing the Farrow Structure," European Conf. Circuit Theory Design, Seville, Spain, Aug. 26-30, 2007.

A. Eghbali, H. Johansson, and P. Löwenborg, "An arbitrary bandwidth transmultiplexer and its application to flexible frequency-band reallocation networks," European Conf. Circuit Theory Design, Seville, Spain, Aug. 26-30, 2007.

O. Gustafsson and M. Olofsson, "Complexity reduction of constant matrix computations over the binary field," Int. Workshop on the Arithmetic of Finite Fields, Madrid, Spain, June 21-22, 2007.

O. Gustafsson, "A difference based adder graph heuristic for multiple constant multiplication problems," IEEE Int. Symp. Circuits Syst., New Orleans, LA, May 27-30, 2007.

O. Gustafsson and H. Johansson, "Complexity comparison of linear-phase Mth-band and general FIR filters," IEEE Int. Symp. Circuits Syst., New Orleans, LA, May 27-30, 2007.

H. Johansson, P. Löwenborg, and K. Vengattaramane, "Least-squares and minimax design of polynomial impulse response FIR filters for reconstruction of two-periodic nonuniformly sampled signals," IEEE Trans. Circuits Syst. I , vol. 54, no. 4, pp. 877–888, Apr. 2007.

S. T. Oskuii, P. G. Kjeldsberg, and O. Gustafsson, "Transition-activity aware design of reduction-stages for parallel multipliers," Great Lakes Symp. on VLSI, Stresa-Lago Maggiore, Italy, March 11-13, 2007.

L. Rosenbaum and H. Johansson, "On low-delay frequency masking FIR filters," Circuits, Syst., Signal Processing, vol. 26, no. 1, pp. 1-25, Feb. 2007.	[Abstract]	[pdf]

2006

E. Backenius and M. Vesterbacka, "Effect of simultaneous switching noise on an analog filter," Int. Conf. Electronics Circ. Syst., ICECS2006, Nice, France, Dec. 10-13, 2006.

A. Blad, H. Johansson, P. Löwenborg, "A general formulation of analog-to-digital converters using parallel sigma-delta modulators and modulation sequences," Asia-Pacific Conference on Circuits and Systems, Singapore, pp. 438-441, Dec. 4-7, 2006.	[abstract]	[pdf]

O. Gustafsson, K. Johansson, H. Johansson, and L. Wanhammar, "Implementation of Polyphase Decomposed FIR Filters for Interpolation and Decimation using Multiple Constant Multiplication Techniques," Asia-Pacific Conference on Circuits and Systems, Singapore, Dec. 4-7, 2006.

H. Johansson, O. Gustafsson, K. Johansson, and L. Wanhammar, "Adjustable Fractional-Delay FIR Filters using the Farrow Structure and Multirate Techniques," Asia-Pacific Conference on Circuits and Systems, Singapore, Dec. 4-7, 2006.

O. Gustafsson and H. Johansson, "Complexity Comparison of Linear-Phase Half-Band and General FIR Filters," Asia-Pacific Conference on Circuits and Systems, Singapore, Dec. 4-7, 2006.

E. Säll and M. Vesterbacka, "6-bit Flash ADC with Dynamic Element Matching," IEEE Norchip Conf., Linköping, Sweden, pp. 159-162, Nov. 20-21, 2006.		[pdf]

A. Blad, C. Svensson, H. Johansson, S. Andersson, "An RF Sampling Radio Frontend Based on Sigma-Delta Conversion," IEEE Norchip Conf., Linköping, Sweden, pp. 133-136, Nov. 20-21, 2006.	[abstract]	[pdf]

K. Holm and O. Gustafsson, "Low-complexity and low-power color space conversion for digital video," IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006.

K. Johansson, O. Gustafsson, and L. Wanhammar, "Conversion and addition in logarithmic number systems using a sum of bit-products," IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006.

J. Carlsson, K. Palmkvist, and L. Wanhammar, "A Clock Gating Circuit for Globally Asynchronous Locally Synchronous Systems," IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006.		[pdf]

E. Backenius, E. Säll, K. Ola Andersson, and M. Vesterbacka, "Programmable reference generator for on-chip measurement," IEEE Norchip Conf., Linköping, Sweden, pp. 89-92, Nov. 20-21, 2006.		[pdf]

E. Backenius and M. Vesterbacka, "Reduction of simultaneous switching noise in digital circuits," IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006.		[pdf]

A. Peng, S. Zhuang, H. Johansson and L. Wanhammar, "Analysis filters' symmetry polarities of M-channel alias-free LPFB with LP DF," Proc. of the 8th Int. Conf. On Signal Processing (ICSP'06), Nov. 16-20, 2006, Guilin, China.	[Abstract]	[pdf]

O. Gustafsson and K. Johansson, "Multiplierless Piecewise Linear Approximation of Elementary Functions," Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 29-Nov. 1, 2006.

O. Gustafsson and H. Johansson, "Efficient Implementation of FIR Filter Based Rational Sampling Rate Converters Using Constant Matrix Multiplication," Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 29-Nov. 1, 2006.

H. Johansson, P. Löwenborg, and K. Vengattaramane, "Reconstruction of M-periodic nonuniformly sampled signals using multivariate impulse response time-varying FIR filters," to appear in Proc. XIV European Signal Processing Conf., EUSIPCO'06, Florence, Italy, Sept. 4-8, 2006.

L. Rosenbaum, H. Johansson, and P. Löwenborg and "Oversampled complex-modulated causal IIR filter banks for flexible frequency-band reallocation networks," to appear in Proc. XIV European Signal Processing Conf., EUSIPCO'06, Florence, Italy, Sept. 4-8, 2006.

A. Blad, P. Löwenborg and H. Johansson, "Design trade-offs for linear-phase FIR decimation filters and sigma-delta modulators," in Proc. XIV European Signal Processing Conf., EUSIPCO'06, Florence, Italy, Sept. 4-8, 2006.		[pdf]

M. Olsson, P. Löwenborg and H. Johansson, "Time-delay estimation using Farrow-based fractional-delay FIR filters: filter approximation vs. estimation errors," to appear in Proc. XIV European Signal Processing Conf., EUSIPCO'06, Florence, Italy, Sept. 4-8, 2006.

H. Johansson and E. Hermanowicz, “Adjustable fractional-delay filters utilizing the Farrow structure and multirate techniques,” in Proc. Sixth Int. Workshop Spectral Methods Multirate Signal Processing, , Florence, Italy, Sept. 1–2, 2006.

A. Blad and O. Gustafsson, "Energy-efficient data representation in LDPC decoders," IET Electronics Letters, vol. 42, no. 18, pp. 1051-1052, 31 Aug. 2006.	[abstract]	[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Multiple constant multiplication for digit-serial implementation of low power FIR filters," WSEAS Trans. Circuits Syst., vol. 5, no. 7, pp. 1001-1008, July 2006.

J. Carlsson, K. Palmkvist, and L. Wanhammar, "Design Flow for Globally Asynchronous Locally Synchronous Systems using Conventional Synchronous Design Tools," WSEAS Trans. on Circuits and Systems, vol.5, no. 7, pp. 953-960, July 2006.		[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "Synchronous Design Flow for Globally Asynchronous Locally Synchronous Systems," WSEAS Int. Conf. Circuits, Vouliagmeni, Greece, July 10-12, 2006.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Trade-offs in multiplier block algorithms for low power digit-serial FIR filters," WSEAS Int. Conf. Circuits, Vouliagmeni, Greece, July 10-12, 2006.

M. Olsson, P. Löwenborg and H. Johansson, "Delay Estimation Using Adjustable Fractional Delay All-Pass Filters," to appear in Proc. Nordic Signal Processing Symp., NORSIG'06, Reykjavik, Iceland, June 7-9, 2006.		[pdf]

M. Karlsson and M. Vesterbacka, "Digit-serial/parallel multipliers with improved throughput and latency," in Proc. IEEE Int. Symp. Circuits Syst., ISCAS'06, Kos Island, Greece, May 21-24, 2006.		[pdf]

E. Backenius, E. Säll, and O. Gustafsson, "Bidirectional conversion to minimum signed-digit representation," IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006.		[pdf]

H. Johansson, P. Löwenborg, and K. Vengattaramane, "Reconstruction of two-periodic nonuniformly sampled signals using polynomial impulse response time-varying FIR filters," in Proc. IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006.

C. Vogel and H. Johansson, "Time-interleaved analog-to-digital converters: Status and future directions," in Proc. IEEE Int. Symp. Circuits Syst., Kos, Greece, May 21-24, 2006.

K. Johansson, O. Gustafsson, and L. Wanhammar, "Approximation of elementary functions using a weighted sum of bit-products," IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006.

H. Johansson, "Two classes of frequency-response masking linear-phase FIR filters for interpolation and decimation," Circuits, Syst., Signal Processing - Special issue on Computationally Efficient Digital Filters: Design and Applications, vol. 25, no. 2, pp. 175-200, Apr. 2006.		[pdf]

O. Gustafsson, A. G. Dempster, K. Johansson, M. D. Macleod, and L. Wanhammar, "Simplified design of constant coefficient multipliers," Circuits, Systems and Signal Processing, vol. 25, no. 2, pp. 225-251, Apr. 2006.		[pdf]

H. Johansson and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals by means of time-varying discrete-time FIR filters," J. Applied Signal Processing - Special Issue on Frames and Overcomplete Representations in Signal Processing, Communications, and Information Theory, Spring 2006.

P. Löwenborg and H. Johansson, "Minimax design of adjustable-bandwidth linear-phase FIR filters," IEEE Trans. Circuits Syst. I, vol. 53, no. 2, pp. 431-439, Feb. 2006.

S. Zhuang, A. Peng, and L. Wanhammar, "Novel Asynchronous Wrapper and Its Application to GALS Systems," Journal of Southwest Jiaotong University, Vol.14, No. 1, Feb. 2006.

2005

E. Säll and M. Vesterbacka, "Design of a comparator in CMOS SOI," accepted for publication in Annals for Micro and Nano Systems: Special Issue for the IWSOC 2004 Conference.

J. Löfvenberg, T. Lindkvist, O. Gustafsson, H. Ohlsson, K. Johansson, and L. Wanhammar, "Approaches to low energy data representation for coupling dominated buses," accepted for publication in Annals for Micro and Nano Systems: Special Issue for the IWSOC 2004 Conference.

O. Andersson and M. Vesterbacka, "A parameterized cell-based design approach for digital-to-analog converters," accepted for publication in Annals for Micro and Nano Systems: Special Issue for the IWSOC 2004 Conference.

K. Landernäs, J. Holmberg, and M. Vesterbacka, "Glitch reduction in digit-serial recursive filters using retiming," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'05, Gammarth, Tunisia, Dec. 11-14, 2005.

E. Säll and M. Vesterbacka, "Comparison of two thermometer-to-binary decoders for high-performance flash ADCs," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'05, Oulu, Finland, Nov. 21-22, 2005.		[pdf]

A. Blad, O. Gustafsson, and L. Wanhammar, "Implementation aspects of an early decision decoder for LDPC codes," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'05, Oulu, Finland, pp. 157-160, Nov. 21-22, 2005.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Low power architectures for sine and cosine computation using a sum of bit-products," Proc. IEEE NorChip Conf, Oulu, Finland, Nov. 21-22, 2005.	[Abstract]	[pdf]

M. Karlsson, M. Vesterbacka, and W. Kulesza, "Algorithm transformations in design of digit-serial FIR filters," Proc. IEEE Workshop Signal Processing Systems, SIPS'05, pp. 81-86, Athens, Greece, Nov. 3-4, 2005.		[pdf]

O. Andersson and M. Vesterbacka, "Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters," IEEE Trans. Circuits Syst. Part I: Regular Papers, vol. 52, no. 11, pp. 2265-2275, Nov. 2005.		[pdf]

A. Blad, O. Gustafsson, and L. Wanhammar, "A hybrid early decision-probability propagation decoding algorithm for low-density parity-check codes," Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, pp. 586-590, Oct. 30-Nov. 2, 2005.	[Abstract]	[pdf]

O. Gustafsson, K. Johansson, and L. Wanhammar, "Optimization and quantization effects for sine and cosine computation using a sum of bitproducts," Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 30-Nov. 2, 2005.	[Abstract]	[pdf]

H. Johansson and O. Gustafsson, "Linear-phase FIR interpolation, decimation, and Mth-band filters utilizing the Farrow structure," IEEE Trans. Circuits Syst. I, vol. 52, no. 10, pp. 2197-2207, Oct. 2005..	[Abstract]	[pdf]

M. Olsson and H. Johansson, "OFDM Carrier Frequency Offset Estimation Using Null Subcarriers," 10th International OFDM Workshop, Hamburg, Germany, Aug. 30-Sept. 1, 2005		[pdf]

E. Hermanowicz and H. Johansson, "On designing minimax adjustable wideband fractional delay FIR filters using two-rate approach," in Proc. European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.		[pdf]

O. Andersson and M. Vesterbacka, "A yield-enhancement strategy for binary-weighted DACs," Proc. European Conf. Circuit Theory Design, ECCTD'05, pp. 55-58, Cork, Ireland, Aug. 29-Sept. 1, 2005.		[pdf]

E. Säll and M. Vesterbacka, "6 bit 1 GHz CMOS silicon-on-insulator flash analog-to-digital converter for read channel applications," Proc. European Conf. Circuit Theory Design, ECCTD'05, pp. 127-130, Cork, Ireland, Aug. 29-Sept. 1, 2005.		[pdf]

A. Blad, O. Gustafsson, and L. Wanhammar, "An early decision decoding algorithm for LDPC codes using dynamic thresholds," European Conf. Circuit Theory Design, Cork, Ireland, pp. 285-288, Aug. 29-Sept. 1, 2005.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "A detailed complexity model for multiple constant multiplication and an algorithm to minimize the complexity," European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.		[pdf]

L. Wanhammar, K. Johansson, and O. Gustafsson, "Efficient sine and cosine computation using a weighted sum of bit-products," European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.		[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "GALS port implementation in FPGA," in National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005.		[pdf]

E. Säll and M. Vesterbacka, "Design and evaluation of a comparator in CMOS SOI," Proc. National Conf. Radio Science, RVK'05, Linköping, Sweden, June 14-16, 2005.		[pdf]

E. Backenius and M. Vesterbacka, "Introduction to substrate noise in SOI CMOS integrated circuits," Proc. National Conf. Radio Science, RVK'05, Linköping, Sweden, June 14-16, 2005.		[pdf]

L. Rosenbaum and H. Johansson, "Narrow-band and wide-band short-delay frequency-masking FIR filters," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005.

M. Olsson and H. Johansson, "An overview of OFDM synchronization techniques," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005.		[pdf]

O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Carry-save adder based difference methods for multiple constant multiplication in high-speed FIR filters," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 245-248.		[pdf]

A. Blad, O. Gustafsson, and L. Wanhammar, "An LDPC decoding algorithm utilizing early decisions," National Conf. Radio Science (RVK), Linköping, Sweden, pp. 445-448, June 14-16, 2005.		[pdf]

K. Johansson, O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Trade-offs in low power multiplier blocks using serial arithmetic," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 271-274.		[pdf]

J. Löfvenberg, O. Gustafsson, K. Johansson, T. Lindkvist, H. Ohlsson, and L. Wanhammar, "Coding schemes for deep sub-micron data buses," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 257-260.		[pdf]

D. González Muñoz, O. Gustafsson, and L. Wanhammar, "Evolution of filter order equations for linear-phase FIR filters using gene expression programming," National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 679-682.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Implementation of low-complexity FIR filters using serial arithmetic," IEEE Int. Symp. Circuits Syst., Kobe, Japan, May 23-26, 2005.	[Abstract]	[pdf]

O. Gustafsson and H. Ohlsson, "A low power decimation filter architecture for high-speed single-bit sigma-delta modulation," IEEE Int. Symp. Circuits Syst., Kobe, Japan, May 23-26, 2005.	[Abstract]	[pdf]

E. Säll and M. Vesterbacka, "Mixed signal design in SOI CMOS technology," Proc. Swedish System-on-Chip Conf., SSoCC'05, Tammsvik, Sweden, April 18-19, 2005.		[pdf]

E. Backenius and M. Vesterbacka, "Pin assignment for low simultaneous switching noise," Proc. Swedish System-on-Chip Conf., SSoCC'05, Tammsvik, Sweden, April 18-19, 2005.		[pdf]

P. Löwenborg, L. Rosenbaum, and H. Johansson, "On flexible analog/digital interfaces for multi-mode communication," Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.

M. Olsson and H. Johansson, "Estimating the OFDM carrier frequency offset by locating null subcarriers," in Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Estimation of switching activity for ripple-carry adders adopting the dual bit type method," in Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.		[pdf]

A. Blad, O. Gustafsson, and L. Wanhammar, "Early decision decoding methods for low-density parity-check codes," in Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.		[pdf]

J. Löfvenberg, O. Gustafsson, K. Johansson, T. Lindkvist, H. Ohlsson, and L. Wanhammar, "New applications for coding theory in low-power electronic circuits," in Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.

H. Johansson and P. Löwenborg, "Flexible frequency-band reallocation network based on variable oversampled complex-modulated filter banks," in Proc. IEEE Int. Conf. Acoust. Speech, Signal Processing, Philadelphia, USA, 18-23 Mar. 2005.	[Abstract]	[pdf]

2004

O. Gustafsson, "Graph-based code word selection for memoryless low power bus coding," Electronics Letters, vol. 40, no. 24, 25 Nov. 2004.	[Abstract]	[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "Port controller for GALS with first come first served function," Proc. TENCON 2004, Chiang Mai, Thailand, Nov. 21-24, 2004.	[Abstract]	[pdf]

E. Backenius and M. Vesterbacka, "Evaluation of a clocking strategy with relaxed constraints on clock edges," Proc. IEEE Analog and Digital Techniques in Electrical Eng., TENCON'04, Chiang Mai, Thailand, Nov. 21-24, 2004.	[Abstract]	[pdf]

E. Säll and M. Vesterbacka, "A multiplexer based decoder for flash analog-to-digital converters," Proc. IEEE Analog and Digital Techniques in Electrical Eng., TENCON'04, Chiang Mai, Thailand, Nov. 21-24, 2004.	[Abstract]	[pdf]

H. Ohlsson, B Mesgarzadeh, K. Johansson, O. Gustafsson, P. Löwenborg, H. Johansson, and A. Alvandpour, "A 16 GSPS 0.18 µm CMOS Decimator for Single-Bit SD-Modulation," Proc. IEEE NorChip Conf., Oslo, Norway, Nov. 8-9, 2004, pp. 175-178.		[pdf]

O. Andersson and M. Vesterbacka, "Dynamic element matching in decomposed digital-to-analog converters," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'04, Oslo, Norway, Nov. 8-9, 2004, pp. 187-190.		[pdf]

A. Åslund, O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Power Analysis of High Throughput Pipelined Carry-Propagation Adders," Proc. IEEE NorChip Conf., Oslo, Norway, Nov. 8-9, 2004, pp. 139-142.	[Abstract]	[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar, "Yield Enhancement Techniques in Analog Design Automation," Proc. IEEE NorChip Conf., Oslo, Norway, Nov. 8-9, 2004.	[Abstract]	[pdf]

O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Improved multiple constant multiplication using minimum spanning trees," Asilomar Conf. Signals, Syst., Comp., Monterey, CA, Nov. 7-10, 2004.		[pdf]

O. Gustafsson, J. O. Coleman, A. G. Dempster, and M. D. Macleod, "Low-complexity hybrid form FIR filters using matrix multiple constant multiplication," Asilomar Conf. Signals, Syst., Comp., Monterey, CA, Nov. 7-10, 2004.		[pdf]

A. G. Dempster, M. D. Macleod, and O. Gustafsson, "Comparison of graphical and sub-expression elimination methods for design of efficient multipliers," Asilomar Conf. Signals, Syst., Comp., Monterey, CA, Nov. 7-10, 2004.		[pdf]

S. Zhuang, J. Carlsson, and L. Wanhammar, "A design approach for GALS based systems-on-chip," in Proc. of the 7th Inter. Conf. on Solid-State and Integrated Circuits Technology (ICSICT'2004), vol. 2, pp. 1368-1371, Oct. 18-21, 2004, Beijing, China.	[Abstract]	[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Power Estimation for Ripple-Carry Adders with Correlated Input Data," IEEE Int. Workshop on Power and Timing Modeling, Optimization and Simulation, Santorini, Greece, Sept. 15-17, 2004.		[pdf]

M. Olsson and H. Johansson, "Blind OFDM carrier frequency offset estimation by locating null subcarriers," in Proc. 9th Int. OFDM-Workshop, Dresden, Germany, Sept. 15-16, 2004.		[pdf]

M. Olsson, P. Löwenborg, and H. Johansson, "Scaling and round-off noise in multistage interpolators and decimators," in Proc. Fourth Int. Workshop Spectral Methods Multirate Signal Processing, Vienna, Austria, Sept. 11-12, 2004.		[pdf]

H. Johansson and Per Löwenborg, "Reconstruction of periodically nonuniformly sampled bandlimited signals using time-varying FIR filters," in Proc. Fourth Int. Workshop Spectral Methods Multirate Signal Processing, Vienna, Austria, Sept. 11-12, 2004.		[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "Port controllers for a GALS Implementation of a 2-D DCT Processor," 10th International Symposium on Integrated Circuits, Devices and Systems, Suntec, Singapore, Sept. 8-10, 2004.		[pdf]

M. Olsson, P. Löwenborg, and H. Johansson, "Scaling of multistage interpolators," in Proc. XII European Signal Processing Conf., Vienna, Austria, Sept. 6-10, 2004.		[pdf]

H. Johansson and Per Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals using time-varying discrete-time FIR filters," in Proc. XII European Signal Processing Conf., Vienna, Austria, Sept. 6-10, 2004.		[pdf]

S. Zhuang, J. Carlsson, W. Li, K. Palmkvist, and L. Wanhammar, "GALS based approach to the implementation of the DWT filter bank," in Proc. Int. Conf. on Signal Processing, ICSP'04., vol. 1, pp. 567-570, Aug. 31 - Sept. 4, 2004.	[Abstract]	[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "First-order sensitivity of complementary diplexers," in IEEE Trans. Circuits Syst. II, vol. 51, no. 8, pp. 421 - 425, Aug. 2004.	[Abstract]	[pdf]

O. Andersson and M. Vesterbacka, "A parameterized cell-based design approach for digital-to-analog converters," Proc. IEEE Int. Workshop System-on-Chip for Real-Time Applications, IWSOC'04, Banff, Canada, Jul. 19-21, 2004.	[Abstract]	[pdf]

T. Lindkvist, J. Löfvenberg, H. Ohlsson, K. Johansson and L. Wanhammar, "A power-efficient, low-complexity, memoryless coding scheme for buses with dominating inter-wire capacitance," IEEE Int. Workshop on System-on-Chip for Real-Time Appl., Banff, Canada, July 19-21, 2004.	[Abstract]	[pdf]

E. Säll and M. Vesterbacka, "Design of a comparator in CMOS SOI," Proc. IEEE Int. Workshop on System-on-Chip for Real-Time Appl., IWSOC'04, Banff, Canada, July 19-21, 2004.	[Abstract]	[pdf]

M. Karlsson, M. Vesterbacka, and W. Kulesza, "Pipelining of digit-serial processing elements in recursive digital filters," Proc. Nordic Signal Processing Symp., NORSIG'04, pp. 129-132, Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

E. Säll, O. Andersson and M. Vesterbacka, "A dynamic element matching technique for flash analog-to-digital converters," Proc. Nordic Signal Processing Symp., NORSIG'04, pp. 137-140, Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

K. Landernäs, J. Holmberg, and O. Gustafsson, "Implementation of bit-level pipelined digit-serial multipliers," Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

O. Gustafsson and A. G. Dempster, "On the use of multiple constant multiplication in polyphase FIR filters and filter banks," Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach," Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

T. Lindkvist, J. Löfvenberg, and O. Gustafsson, "Deep sub-micron bus invert coding," Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004.	[Abstract]	[pdf]

H. Johansson and O. Gustafsson, "Mth-band linear-phase FIR filter interpolators and decimators utilizing the Farrow structure," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Multiplier blocks using carry-save adders," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

E. Säll, M. Vesterbacka, and O. Andersson, "A study of digital decoders in flash analog-to-digital converters," Proc. IEEE Int. Symp. Circuits Syst., ISCAS'04, vol. 1, pp. 129-132, Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Low-complexity bit-serial constant-coefficient multipliers," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

H. Ohlsson, O. Gustafsson, and L. Wanhammar, "A shifted permuted difference coefficient method," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol 3, pp. 161-164.	[Abstract]	[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity in bit-serial constant coefficient multipliers," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

K. Landernäs, J. Holmberg, and M. Vesterbacka, "A high-speed low-latency digit-serial hybrid adder," Proc. IEEE Int. Symp. Circuits Systems, ISCAS'04, vol. 3, pp. 217-220, Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

M. Karlsson, M. Vesterbacka, and W. Kulesza, "A method for increasing the throughput of fixed cofficient digit-serial/parallel multipliers," Proc. IEEE Int. Symp. Circuits Systems, ISCAS'04, vol. 2, pp. 425-428, Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

H. Johansson, "On the design of IIR bandpass filters with an adjustable bandwidth and centre frequency," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

P. Löwenborg and H. Johansson, "Minimax design of linear-phase FIR filters with adjustable bandwidths," IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004.	[Abstract]	[pdf]

H. Ohlsson, O. Gustafsson, and L. Wanhammar, "Implementation of low complexity FIR filters using a minimum spanning tree," IEEE Mediterranean Electrotechnical Conf., Dubrovnik, Croatia, May 12-15, 2004, vol 1, pp. 261-264.	[Abstract]	[pdf]

O. Andersson and M. Vesterbacka, "Partial decomposition of digital-to-analog converters," Proc. IEEE Mediterranean Electrotechnical Conf., MELECON'04, vol. 1, pp. 193-196, Dubrovnik, Croatia, May 12-15, 2004.	[Abstract]	[pdf]

E. Backenius and M. Vesterbacka, "Design of circuits for a robust clocking scheme," Proc. IEEE Mediterranean Electrotechnical Conf., MELECON'04, vol. 1, pp. 185-188, Dubrovnik, Croatia, May 12-15, 2004.	[Abstract]	[pdf]

K. Johansson, O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Algorithm to reduce the number of shifts and additions in multiplier blocks using serial arithmetic," IEEE Mediterranean Electrotechnical Conf., Dubrovnik, Croatia, May 12-15, 2004.	[Abstract]	[pdf]

H. Johansson and P. Löwenborg, "On linear-phase FIR filters with variable bandwidth," IEEE Trans. Circuits Syst. -II: Express Briefs, Vol. 51, No. 4, April 2004.	[Abstract]	[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Power estimation for bit-serial constant coefficient multipliers," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

W. Li and L. Wanhammar, "An offset prefix adder for conversion and addition," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar, "Automated Device Sizing of Analog Circuits With Yield Enhancement," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

E. Säll and M. Vesterbacka, "Silicon-on-insulator CMOS technology for system-on-chip," Proc. Swedish System-on-Chip Conference 2004, SSoCC'04, Båstad, Sweden, Apr. 13-14, 2004.		[pdf]

O. Andersson and M. Vesterbacka, "A testbed for different codes in digital-to-analog converters," Proc. Swedish System-on-Chip Conference 2004, SSoCC'04, Båstad, Sweden, Apr. 13-14, 2004.		[pdf]

O. Gustafsson and L. Wanhammar, "Design of reduced complexity linear-phase polyphase FIR filters using mixed integer linear programming," Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

H. Ohlsson, O. Gustafsson and L. Wanhammar, "Implementation of low-complexity FIR filters using difference methods," Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "GALS Implementation of a 2-D DCT Processor," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

T. Johansson, P. Thalin, U. Lindblad, and Lars Wanhammar, "Development and validation of a scalable DSP core," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.		[pdf]

E. Backenius and M. Vesterbacka, "A digital circuit with relaxed clocking," Proc. Swedish System-on-Chip Conf., SSoCC'04, Båstad, Sweden, April 13-14, 2004.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "MILP design of frequency-response masking FIR filters with few SPT terms," Int. Symp. Control, Communications, Signal Processing, Hammamet, Tunisia, March 21-24, 2004.		[pdf]

2003

H. Johansson, "Multirate IIR filter structures for arbitrary bandwidths," IEEE Trans. Circuits Syst. I, vol. 50, no. 12, pp. 1515-1529, Dec. 2003.	[Abstract]	[pdf]

J. Carlsson, K. Palmkvist, and L. Wanhammar, "An 8-by-8 Point 2D DCT Processor Based on the GALS Approach," in Proc. IEEE NorChip Conf., Riga, Latvia November 10-11, 2003.		[pdf]

H. Ohlsson, W. Li, D. Capello, and L. Wanhammar, "Design and implementation of an SRAM layout generator," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003, pp216-219.		[pdf]

K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity in bit-serial constant coefficient serial/parallel multipliers," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003.		[pdf]

O. Gustafsson, H. Ohlsson, M. Mohsen, and L. Wanhammar, "Implementation of high-speed single filter frequency-response masking recursive filters," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003, pp. 291-294.		[pdf]

M. Karlsson, M. Vesterbacka, and W. Kulesza, "Ripple-carry versus carry-look-ahead digit-serial adders," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'03, pp. 264-267, Riga, Latvia, Nov. 10-11, 2003.

M. Karlsson, M. Vesterbacka, and W. Kulesza, "Design of digit-serial pipelines with merged logic and latches," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'03, pp. 68-71, Riga, Latvia, Nov. 10-11, 2003.

W. Li, J. Carlsson, J. Claeson, and L. Wanhammar, "A GALS Based 16-Point Pipeline FFT Core," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003.		[pdf]

M. Karlsson and M. Vesterbacka, "A non-overlapping two-phase clock generator with adjustable duty cycle," Electronic Proc. Nat. Symp. Microwave Technique and High Speed Electronics, GIGAHERTZ'03, Linköping, Sweden, Nov. 4-5, 2003.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Single filter frequency-response masking FIR filters," in J. Circuits, Syst., Comput., vol. 12, no. 5, pp. 601-630, Oct. 2003.	[Abstract]	[pdf]

T. Saramäki, J. Yli-Kaakinen, and H. Johansson "Optimization of frequency-response-masking based FIR filters," in J. Circuits, Syst., Comput., vol. 12, no. 5, pp. 563-591, Oct. 2003.	[Abstract]	[pdf]

B. Soltanian, T. Saramäki, and H. Johansson, "Design of optimum recursive filters with double zeros on the unit circle leading to symmetric ladder wave digital filter structures," in Proc. Int. Symp. Image, Signal Processing, Analysis, Rome, Italy, Sept. 18-20, 2003.	[Abstract]	[pdf]

H. Johansson, "Efficient frequency-response-masking based FIR filter structures for interpolation and decimation," Third Int. Workshop Spectral Methods Multirate Signal Processing, Barcelona, Spain, Sept. 13-14, 2003.		[pdf]

E. Hjalmarson, R. Hägglund, and L. Wanhammar, "Design Space Exploration and Trade-Offs in Analog Amplifier Design," Proc. Power and Timing Modeling, Optimization and Simulation, Torino, Italy, Sep. 10-12, 2003.		[pdf]

H. Johansson, "On lowpass and highpass IIR filters with an adjustable bandwidth," European Conf. Circuit Theory Design (ECCTD '03), Krakow, Poland, Sept. 1-4, 2003.		[pdf]

L. Rosenbaum and H. Johansson, "Two-channel linear-phase FIR filter banks utilizing the frequency-response masking approach," European Conf. Circuit Theory Design, Krakow, Poland, Sept. 1-4, 2003.		[pdf]

A. G. Dempster, O. Gustafsson, and J. O. Coleman, "Towards an algorithm for matrix multiplier blocks," in Proc. European Conf. Circuit Theory Design, Krakow, Poland, Sept. 1-4, 2003.		[pdf]

E. Hjalmarson, R. Hägglund, and L. Wanhammar, "Optimization-Based Design Space Exploration of Analog Circuits" Proc. European Conference on Circuit Theory and Design, Krakow, Poland, Sep. 1-4, 2003.		[pdf]

E. Hjalmarson, R. Hägglund, and L. Wanhammar, "An Optimization-Based Approach for Analog Circuit Design" Proc. European Conference on Circuit Theory and Design, Krakow, Poland, Sep. 1-4, 2003.		[pdf]

P. Löwenborg and H. Johansson, "Analysis of continuous-time-input sigma-delta modulators and their generalization," in Proc. European Conf. Circuits, Theory, Design Krakow, Poland, Sept. 1-4, 2003.

E. Elias, P. Löwenborg, H. Johansson, and L. Wanhammar, "Tree-structured IIR/FIR uniform-band and octave-band filter banks with very low-complexity analysis or synthesis filters," EURASIP Signal Processing, vol. 83, no. 9, pp. 1997-2009, Sep. 2003.		[pdf]

E. Hjalmarson, R. Hägglund, and L. Wanhammar, "An Equation-Based Optimization Approach for Analog Circuit Design" Proc. Int. Symp. on Signals, Circuits & Systems, Iasi, Romania, July 2003.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "Two-channel digital and hybrid analog/digital multirate filter banks with very low complexity analysis or synthesis filters," in IEEE Trans. Circuits Syst. II., Vol.50, No. 7, July 2003.		[pdf]

H. Johansson and P. Löwenborg, "Linear programming design of linear-phase FIR filters with variable bandwidth,"in Proc. IEEE Symp. Circuits Syst., Bangkok, Thailand, May 25-28, 2003.		[pdf]

L. Rosenbaum, P. Löwenborg, and H. Johansson, "Cosine and sine modulated filter banks utilizing the frequency-response masking approach,"in Proc. IEEE Symp. Circuits Syst., Bangkok, Thailand, May 25-28, 2003.		[pdf]

E. Säll, "A 1.8V 10-bit 80MS/s Low Power Track-and-Hold Circuit in a 0.18µm CMOS Process,"in Proc. IEEE Symp. Circuits Syst., Bangkok, Thailand, May 25-28, 2003.		[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar, "Using Optimization to Find Design Trade-Offs in Analog Amplifier Design" in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden, April 8-9, 2003.		[pdf]

E. Hjalmarson, R. Hägglund, and L. Wanhammar, "A Design Platform for Computer-Aided Design of Analog Amplifiers" in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden, April 8-9, 2003.		[pdf]

J. Carlsson, W. Li, K. Palmkvist, L. Wanhammar, and S. Zhuang, "A Design Path for Design of GALS Based Communication Systems," in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden April 8-9, 2003.		[pdf]

H. Ohlsson, O. Gustafsson, W. Li, and L. Wanhammar, "An environment for design and implementation of energy efficient digital filters," in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden April 8-9, 2003.		[pdf]

E. Backenius and M. Vesterbacka, "Characteristics of a differential D flip-flop," Proc. Swedish System-on-Chip Conf., SSoCC'03, Eskilstuna, Sweden April 8-9, 2003.		[pdf]

M. Karlsson and M. Vesterbacka, "A robust non-overlapping two-phase clock generator," Proc. Swedish System-on-Chip Conf., SSoCC'03, Eskilstuna, Sweden April 8-9, 2003.

O. Andersson, N. Andersson, M. Vesterbacka, and J. Wikner, "A 14-bit dual current-steering DAC," Proc. Swedish System-on-Chip Conf., SSoCC'03, Eskilstuna, Sweden April 8-9, 2003.		[pdf]

W. Li and L. Wanhammar, "Low Power Design for Data Dependence," in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden April 8-9, 2003.		[pdf]

M. Olsson, "Implementation of an IEEE802.11a Synchronizer," in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden, April 8-9, 2003		[pdf]

H. Johansson and Löwenborg, "On the design of adjustable fractional delay FIR filters," IEEE Trans. Circuits Syst. II, vol. 50, no. 4, pp. 164169, Apr. 2003.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Single filter frequency masking high-speed recursive digitals filters," Circuits, Syst., Signal Processing, vol. 22, no. 2, pp. 219-238, Mar. 2003.	[Abstract]	[pdf]

H. Johansson and T. Saramäki, "Two-channel FIR filter banks utilizing the frequency-response masking approach," Circuits, Syst., Signal Processing, vol. 22, no. 2, pp. 157-192, Mar. 2003.	[Abstract]	[pdf]

O. Andersson, N. Andersson, M. Vesterbacka, and J. Wikner, "A method of segmenting digital-to-analog converters," Proc. IEEE Southwest Symp. Mixed-Signal Design, SSMSD'03, pp. 32-37, Las Vegas, NV, USA, Feb. 23-25, 2003		[pdf]

N. Andersson, O. Andersson, J. Wikner, and M. Vesterbacka, "Models and implementation of a dynamic element matching DAC," Kluwer International Journal of Analog Integrated Circuits and Signal Processing, Special Issue: Selected Papers from the NORCHIP 2001 Conference, vol. 34, no. 1, pp. 7-16, Jan. 2003		[pdf]

2002


H. Johansson and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals by means of digital fractional delay filters," in IEEE Trans. Signal Proc., Vol. 50, No. 11, Nov. 2002		[pdf]

H. Johansson, "A class of Mth-band linear-phase FIR filters synthesized using the frequency-response masking approach," in Proc. IEEE Nordic Signal Processing Symp., Hurtigruten, Norway, Oct. 4, 2002.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "First-order sensitivity of constant-resistance analog filters with application to filter banks," in Proc. Proc. IEEE Nordic Signal Processing Symp., Hurtigruta, Tromsö-Trondheim, Norway, Oct. 4-7, 2002

L. Svensson, P. Löwenborg, and H. Johansson, "Modulated M-channel FIR filter banks utilizing the frequency response masking approach," in Proc. Proc. IEEE Nordic Signal Processing Symp., Hurtigruta, Tromsö-Trondheim, Norway, Oct. 4-7, 2002.

O. Gustafsson and L. Wanhammar, "Design of linear-phase FIR filters with minimum Hamming distance," IEEE Nordic Signal Processing Symp., Hurtigruten, Norway, Oct. 4-7, 2002.		[pdf]

S. Zhuang, W. Li, J. Carlsson, K. Palmkvist, and L. Wanhammar, "The VLSI Implementation of 1-D DWT Based On GALS Systems," in Proc. IEEE Nordic Signal Processing Symp., Hurtigruta, Tromsö-Trondheim, Norway, Oct. 4-7, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, "Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulation," Int. Conf. Electronics Circuits Syst., Dubrovnik, Croatia, Sept. 15-18, 2002.		[pdf]

S. Zhuang,W. Li, J. Carlsson, K. Palmkvist, and L. Wanhammar, "Asynchronous Data Communication with Low Power for GALS Systems," in Proc. IEEE ICECS2002, Dubrovnik, Croatia, Sept. 15-18, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, "ILP modelling of the common subexpression sharing problem," Int. Conf. Electronics Circuits Syst., Dubrovnik, Croatia, Sept. 15-18, 2002.		[pdf]

L. Svensson, P. Löwenborg, and H. Johansson, "A class of cosine modulated causal IIR filter banks," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Dubrovnik, Croatia, Sept. 15-18, 2002.		[pdf]

H. Johansson, "Efficient FIR filter structures based on the frequency-response masking approach for interpolation and decimation by a factor of two," in Proc. Second Int. Workshop Spectral Methods Multirate Signal Processing (SMMSP), Toulouse, France, Sept. 7-8, 2002.		[pdf]

P. Löwenborg and H. Johansson, "Mitigation of static gain- and time-skew errors in time-interleaved ADCs using a system of digital fractional delay filters," in Proc. Second Int. Workshop Spectral Methods Multirate Signal Processing (SMMSP), Toulouse, France, Sept. 7-8, 2002.

L. Svensson, P. Löwenborg, and H. Johansson, "Asymmetric cosine modulated causal IIR/FIR NPR filter banks," in Proc. Second Int. Workshop Spectral Methods Multirate Signal Processing (SMMSP), Toulouse, France, Sept. 7-8, 2002.

S. Zhuang,W. Li, J. Carlsson, K. Palmkvist, and L. Wanhammar, "An Asynchronous Wrapper with Handshake Circuits for GALS Systems," in Proc. IEEE ICCCAS'02, Cheungdu, China, Aug., 2002.		[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar, "A design path for optimization-based analog circuit design," in Proc. IEEE Midwest Symp. Circuits Syst., Tulsa, Oklahoma, Aug. 4-7, 2002.		[pdf]

E. Backenius, M. Vesterbacka, and R. Hägglund, "A strategy for reducing clock noise in mixed-signal circuits," Proc. IEEE Midwest Symp. Circuits Syst., MWSCAS'02, vol. 1, pp. 29-32, Tulsa, OK, Aug. 4-7, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, "Design of linear-phase FIR filters combining subexpression sharing with MILP," Midwest Symp. Circuits Syst., Tulsa, OK, Aug. 4-7, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, "A novel approach to multiple constant multiplication using minimum spanning trees," Midwest Symp. Circuits Syst., Tulsa, OK, Aug. 4-7, 2002.		[pdf]

O. Andersson, N. Andersson, M. Vesterbacka, and J. Wikner, "Combining DACs for improved performance," Proc. 4th IEE Int. Conf. Advanced A/D and D/A Conversion Techniques and their Appl., ADDA'02, Prague, Czech Republic, June 26-28, 2002		[pdf]

M. Vesterbacka, O. Andersson, N. Andersson, and J. Wikner, "Using different weights in DACs," Proc. 4th IEE In. Conf. on Advanced A/D and D/A Conversion Techniques and their Applications, ADDA'02, Prague, Czech Republic, June 26-28, 2002		[pdf]

L. Svensson and H. Johansson, "Narrow-band and wide-band frequency masking FIR filters with short delay," in Proc. National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, "Optimal logic level pipelining for digit-serial implementation of maximally fast recursive digital filters," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

O. Gustafsson and L. Wanhammar, (Invited paper) "Some Issues in Low Power Arithmetic for Fixed-Function DSP," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

H. Ohlsson and L. Wanhammar, "A Digital Down Converter for a Wideband Radar Receiver," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

E. Backenius, M. Vesterbacka, and R. Hägglund, "Reduction of clock noise in mixed-signal circuits," Proc. National Conf. Radio Science, RVK'02, pp. 197-201, Stockholm, Sweden, June 10-13, 2002.		[pdf]

W. Li, S. Zhuang, and L. Wanhammar, "An Efficient Pipelined Complex Multiplier," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

J. Carlsson, W. Li, T. Njølstad, K. Palmkvist, L. Wanhammar, and S. Zhuang,"A Modular Asynchronous Wrapper," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar,"Automatic device sizing in analog circuit design," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

E. Hjalmarson, R. Hägglund, P. Löwenborg, and L. Wanhammar,"Automatic layout Generation of Matched Capacitors ," National Conf. Radio Science (RVK), Stockholm, Sweden, June 10-13, 2002.		[pdf]

H. Johansson, "Multirate approximately linear-phase IIR filter structures for arbitrary bandwidths," in Proc. IEEE Int. Symp. Circuits Syst., Phoenix, USA, May 26-29, 2002.	[Abstract]	[pdf]

H. Johansson and P. Löwenborg, "Reconstruction of a class of nonuniformly sampled and decimated bandlimited signals," in Proc. IEEE Int. Symp. Circuits Syst., Phoenix, USA, May 26-29, 2002.	[Abstract]	[pdf]

L. Svensson and H. Johansson, "Frequency-response masking FIR filters with short delay," in Proc. IEEE Int. Symp. Circuits Syst., Phoenix, USA, May 26-29, 2002.	[Abstract]	[pdf]

O. Andersson, N.U. Andersson, M. Vesterbacka, and J. Wikner, "A differential DAC architecture with variable common-mode level," IEEE Int. Symp. Circuits Syst., ISCAS'02, vol. 1, pp. 113-116, Phoenix, AZ, May 26-29, 2002.	[Abstract]	[pdf]

O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Extended results for minimum-adder constant integer multipliers," IEEE Int. Symp. Circuits Syst., Phoenix, AZ, May 26-29, 2002.	[Abstract]	[pdf]

R. Hägglund, P. Löwenborg, and M. Vesterbacka, "A polynomial-based division algorithm," IEEE Int. Symp. Circuits Syst., ISCAS'02, vol. 3, pp. 571-574, Phoenix, AZ, May 26-29, 2002.	[Abstract]	[pdf]

K. Landernäs, J. Holmberg, L. Harnefors, and M. Vesterbacka, "Digit-serial implementation of LDI/LDD allpass filters," Proc. 2002 IEEE Int. Symp. on Circuits and Systems, ISCAS'02, vol. 2, pp. 684-687, Phoenix, Arizona, May 24-29, 2002.	[Abstract]	[pdf]

M. Martínez-Peiró, E. Boemo, and L. Wanhammar, "Design of High Speed Multiplierless Filters using a Nonrecursive Signed Common Subexpression Algorithm," IEEE Trans. Circuits Systems, Part II, Vol. 49, No. 3, March 2002.		[pdf]

R. Hägglund, E. Hjalmarson, and L. Wanhammar, "Optimization-Based Device Sizing in Analog Circuit Design," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, Mar. 18-19, 2002.		[pdf]

H. Ohlsson, W. Li, O. Gustafsson, and L. Wanhammar, "A low power architecture for implementation of digital signal processing algorithms," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, Mar. 18-19, 2002.		[pdf]

P. Löwenborg and H. Johansson, "A technique for correction of static gain- and time-skew errors in time-interleaved ADCs," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, Mar. 18-19, 2002.

L. Svensson, P. Löwenborg, and H. Johansson, "Cosine modulated causal IIR NPMR and NPR filter banks," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, Mar. 18-19, 2002.

W. Li and L. Wanhammar, "Complex Multiplication Reduction in FFT Processors," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, Mar. 18-19, 2002.		[pdf]

2001

N. Andersson, O. Andersson, J. Wikner, and M. Vesterbacka, "Models and implementation of a dynamic element matching DAC," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'01, pp. 155-160, Kista, Sweden, Nov. 12-13, 2001.		[pdf]

H. Ohlsson, O. Gustafsson, M. Vesterbacka, and Lars Wanhammar, "A study on pipeline-interleaved digital filters for low power," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'01, Kista, Sweden, Nov. 12-13, 2001.		[pdf]

W. Li, M. Vesterbacka, and L. Wanhammar, "An FFT processor based on 16-point module," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'01, pp. 125-130, Kista, Sweden, Nov. 12-13, 2001.		[pdf]

T. Njolstad, O. Tjore, K. Svarstad, L. Lundheim, T.O. Vedal, J. Typpo, T. Ramstad, L. Wanhammar, E.J. Aas, H. Danielsen, "A socket interface for GALS using locally dynamic voltage scaling for rate-adaptive energy saving," Proc. 14th Annual IEEE Intern. ASIC/SOC Conf., pp.110-116, Rochester, Sept. 11, 2001.		[pdf]

H. Ohlsson, O. Gustafsson, H. Johansson, and Lars Wanhammar, "Implementation of bit-parallel wave digital filters with increased maximal sample rate," in Proc. IEEE Int. Conf. Elec. Circuits Syst., Malta, Sep. 6-9, 2001.		[pdf]

W. Li, S. Zhuang, and L. Wanhammar, "A Pipelined Complex Multiplier," Proc. International Symposium on Integrated Circuits, Devices & Systems, ISIC'01, Singapore, Sep. 3-5, 2001.		[pdf]

M. K. Rudberg, "Calibration of Mismatch Errors in Time-Interleaved ADCs," Proc. IEEE Int. Conf. Electronics Circuits Syst., Malta, Sep. 2-5, 2001.	[Abstract]	[pdf]

O. Gustafsson and L. Wanhammar, "Decreasing the minimal sample period for recursive filters implemented using distributed arithmetic," Proc. IEEE Int. Conf. Electronics Circuits Syst., Malta, Sep. 2-5, 2001.		[pdf]

O. Gustafsson, H. Johansson, and Lars Wanhammar, "An MILP approach for the design of linear-phase FIR filters with minimum number of signed-power-of-two terms," in Proc. European Conf. Circuit Theory Design, Espoo, Finland, Aug. 28-31, 2001.		[pdf]

H. Johansson and P. Löwenborg, "On adjustable fractional delay FIR filters and their design," in Proc. European Conf. Circuit Theory Design, Espoo, Finland, Aug. 28-31, 2001.		[pdf]

H. Johansson, and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals using digital fractional delay filters: Error and quantization noise analysis," in Proc. European Conf. Circuit Theory Design, Espoo, Finland, Aug. 28-31, 2001.		[pdf]

J. Holmberg, K. Landernäs, L. Harnefors, and M. Vesterbacka, "Implementation aspects of second-order LDI/LDD allpass filters," Proc. European Conf. Circuit Theory and Design, ECCTD'01, vol. 1, pp. 237-240, Espoo, Finland, Aug. 28-31, 2001.

P. Löwenborg, H. Johansson, and L. Wanhammar "Analysis of gain and time-skew errors in filter bank based A/D converters," in Proc. IEEE Midwest Symp. Circuits Syst., Dayton, Ohio, Aug. 23-25, 2001.	[Abstract]	[pdf]

P. Löwenborg, E. Elias, H. Johansson, and L. Wanhammar "Two-channel IIR/FIR filter banks with very low-complexity analysis or synthesis filters: Finite wordlength effects," in Proc. IEEE Midwest Symp. Circuits Syst., Dayton, Ohio, Aug. 23-25, 2001.	[Abstract]	[pdf]

M. Vesterbacka, "Linear-coded D/A converters with small relative error due to glitches," Proc. IEEE Midwest Symp. Circuits Syst., MWSCAS'01, vol. 1, pp. 280-283, Dayton, Ohio, Aug. 23-25, 2001.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Narrow-band and wide-band high-speed recursive digital filters using single filter frequency masking techniques," Proc. Int. Symp. Signal Processing Appl., Kuala Lumpur, Malaysia, Aug. 1316, 2001.		[pdf]

R. Hägglund and L. Wanhammar, "Tuning and Compensation of Temperature Effects in Analog Integrated Filters," in Proc. Swedish System-on-Chip Conf., Arild, Sweden, May 20-21, 2001.		[pdf]

O. Andersson, N. U. Andersson, and J. Wikner, "Spectral shaping of DAC nonlinearity errors through modulation of expected errors," in Proc. IEEE International Symposium on Circuits and Systems (ISCAS'01), vol. 3, pp. 417-420, Sydney, Australia, May 6-9, 2001.		[pdf]

E. Elias, P. Löwenborg, H. Johansson, and L. Wanhammar, "Tree-structured IIR/FIR octave-band filter banks with very low-complexity analysis or synthesis filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

H. Johansson, and P. Löwenborg, "Reconstruction of nonuniformly sampled bandlimited signals using digital fractional delay filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Narrow-band and wide-band single filter frequency masking FIR filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Minimum-adder integer multipliers using carry-save adders," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

H. Ohlsson, O. Gustafsson, and L. Wanhammar, "Arithmetic transformations for increased maximal sample rate of bit-parallel bireciprocal lattice wave digital filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

P. Löwenborg and H. Johansson, "Quantization noise in filter bank analog-to-digital converters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.		[pdf]

T. Saramäki and H. Johansson, "Optimization of FIR filters using the frequency-response masking approach," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001.	[Abstract]	[pdf]

M. Vesterbacka and J. Wikner, "Design of encoders for linear-coded D/A converters." Proc. 2001 IEEE Int. Symp. Circuits Systems, ISCAS'01, vol. 1, pp. 524-527, Sydney, Australia, May 6-9, 2001.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "A survey of filter bank A/D converters," in Proc. Swedish System-on-Chip Conf., Arild, Sweden, Mar. 20-21, 2001.

H. Ohlsson and L. Wanhammar, " Implementation of bit-parallel lattice wave digital filters," Swedish System-on-Chip Conf., SSoCC'01, Arild, Sweden, March 20-21, 2001.		[pdf]

W. Li and L. Wanhammar, "Low-Power FFT Processors," Swedish System-on-Chip Conf., SSoCC'01, Arild, Sweden, March 20-21, 2001.		[pdf]

2000

M. Vesterbacka, "A static CMOS master-slave flip-flop experiment," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'00, vol. 2, pp. 870-873, Beirut, Lebanon, Dec. 17-20, 2000.	[Abstract]	[pdf]

M. Vesterbacka, M. Rudberg, J. Wikner, and N.U. Andersson, "Dynamic element matching in D/A converters with restricted scrambling," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'00, vol. 1, pp. 36-39, Beirut, Lebanon, Dec. 17-20, 2000.	[Abstract]	[pdf]

M. Rudberg, M. Vesterbacka, N.U. Andersson, and J. Wikner, "Glitch minimization and dynamic element matching in D/A converters," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'00, vol. 2, pp. 899-902, Beirut, Lebanon, Dec. 17-20, 2000.	[Abstract]	[pdf]

E. Elias, P. Löwenborg, H. Johansson, and L. Wanhammar, "Design of M-channel tree-structured filter banks with very low-complexity analysis filters," in Proc. IEEE Int. Conf. Elec. Circuits Syst., Kaslik, Lebanon, Dec., 2000		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of single filter frequency-response masking FIR filters," in Proc. IEEE Int. Symp. Intelligent Signal Processing Communication Syst., Honolulu, Hawaii, USA, Nov. 5-8, 2000.		[pdf]

H. Ohlsson, H. Johansson, and L. Wanhammar, " Implementation of a combined interpolator and decimator for an OFDM system demonstrator," IEEE NorChip Conf 2000, Turku, Finland, 6-7 Nov, 2000, pp. 47-52.		[pdf]

L. Wanhammar, (Invited Paper) "Design of Digital Filters with Low Power Consumption," Proc. X European Signal Processing Conf., Tampere, Finland, Sept. 4-8, 2000.		[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of narrow-band single filter frequency masking FIR filters," in Proc. X European Signal Processing Conf., Tampere, Finland, Sept. 4-8, 2000, pp. 259-262.		[pdf]

H. Johansson, "On high-speed recursive digital filters," in Proc. X European Signal Processing Conf., Tampere, Finland, Sept. 4-8, 2000.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "A class of two-channel IIR/FIR filter banks," in Proc. European Signal Proc. Conf., Tampere, Finland, Sept., 2000.

O. Andersson and J. Wikner, "Characterization of a CMOS current-steering DAC using state-space models," in Proc. 2000 IEEE Midwest Symp. Circuits Syst. MWSCAS'2000, Michigan, Aug. 5, 2000.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "Two-channel hybrid analog/digital filter banks with alias-free subbands," in Proc. IEEE Midwest Symp. Circuits Syst., Lansing, Michigan, Aug., 2000.	[Abstract]	[pdf]

O. Gustafsson and L. Wanhammar, "Maximally fast numerically equivalent state-space recursive digital filters using distributed arithmetic," in Proc. IEEE Nordic Signal Processing Symp., Kolmården, Sweden, June 13-15, 2000, pp. 227-230.		[pdf]

E. Elias, P. Löwenborg, H. Johansson, and L. Wanhammar," M-channel tree-structured IIR/FIR filter banks with low-complexity analysis filters," in Proc. IEEE Nordic Signal Processing Symp., Kolmården, Sweden, June, 2000		[pdf]

O. Gustafsson and L. Wanhammar, "Maximally fast scheduling of bit-serial lattice wave digital filters using three-port adpator allpass sections," in Proc. IEEE Nordic Signal Processing Symp., Kolmården, Sweden, June 13-15, 2000, pp. 441-444.		[pdf]

H. Johansson, "A class of high-speed wide-band frequency masking recursive digital filters with approximately linear phase," in Proc. IEEE Nordic Signal Processing Symp., Kolmården, Sweden, June 13-15, 2000, pp. 319-322.		[pdf]

H. Ohlsson and L. Wanhammar, " Implementation of a digital beamformer in an FPGA using distributed arithmetic," IEEE Nordic Signal Processing Symposium, Norsig2000, Kolmården, Sweden, June 13-15, 2000, pp. 295-298.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "A two-channel hybrid analog and IIR digital filter bank approximating perfect reconstruction," in Proc. IEEE Nordic Signal Processing Symp., Kolmården, Sweden, June, 2000		[pdf]

M. Karlsson-Rudberg, and M. Hjelm "Application driven DSP Hardware Synthesis," Nordic Signal Processing Symposium, Kolmården, June, 2000.		[pdf]

M. Vesterbacka and J. Wikner, "Dual matrix linear-code D/A converters," Proc. 2000 IEEJ Int. Analog VLSI Workshop, IAVLSIW'00, pp. 63-68, Stockholm, Sweden, June 2-3, 2000.

M. Karlsson-Rudberg, "ADC Offset Identification and Correction in DMT Modems," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS'00, Geneva, May, 2000.	[Abstract]	[pdf]

O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of high-speed narrow-band recursive digital filter using single filter frequency masking techniques," in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May 28-31, 2000, pp. 359-362.		[pdf]

H. Johansson, "New classes of frequency-response masking FIR filters," in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May 28-31, 2000.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "A class of two-channel approximately perfect reconstruction hybrid analog/digital filter banks," in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May, 2000		[pdf]

M. Martinez-Peiro, and L. Wanhammar,"High-Speed low-complexity FIR-Filter Using Multiplier Block Reduction and Polyphase Decomposition," in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May, 2000		[pdf]

Y. Ma and L. Wanhammar, "A Hardware Efficient Control of Memory Addressing for High-Performance FFT Processors," IEEE Trans. on Signal Processing, Vol. 48, No. 3, pp. 917-921, March 2000.		[pdf]

H. Ohlsson, H. Johansson, and L. Wanhammar, " Design of a digital down converter using high speed digital filters," Symposium on Gigahertz Electronics, GHz2000, Gothenburg, Sweden, March 13-14, 2000, pp. 309-312.		[pdf]

J. Wikner and M. Vesterbacka, "D/A conversion with linear-coded weights," Proc. IEEE 2000 Southwest Symp. Mixed-Signal Design, SSMSD'00, pp. 61-66, San Diego, California, Feb. 27-29, 2000.		[pdf]

J. Wikner and M. Vesterbacka, "Characteristics of linear-coded D/A converters," Proc. IEEE 2000 Southwest Symp. Mixed-Signal Design, SSMSD'00, pp. 67-72, San Diego, California, Feb. 27-29, 2000.		[pdf]

N.U. Andersson and J. Wikner, " A strategy of implementing dynamic element matching in current-steering DACs," in Proc. IEEE 2000 Southwest Symp. Mixed-Signal Design, SSMSD'00, pp. 51-56, San Diego, California, Feb. 27-29, 2000.		[pdf]

H. Johansson and L. Wanhammar, "High-speed recursive digital filters based on the frequency-response masking approach," IEEE Trans. Circuits Syst. II, vol. 47, no. 1, pp. 48-61, Jan. 2000.		[pdf]

1999

W. Li, Y. Ma, and L. Wanhammar, "Word length estimation for memory efficient pipeline FFT/IFFT Processors," ICSPAT, Orlando, Florida, USA, Nov. 8-9, 1999.		[pdf]

O. Andersson and J. Wikner, " Modeling of the Influence of Graded Element Matching Errors in CMOS Current-Steering DACs," In Proc. of the NorChip Conf., Oslo, Norway, Nov. 8-9, 1999.		[pdf]

N.U. Andersson and J. Wikner, " Comparison of different dynamic element matching techniques for wideband CMOS DACs," In Proc. of the NorChip Conf., Oslo, Norway, Nov. 8-9, 1999.		[pdf]

W. Li and L. Wanhammar, "Efficient radix-4 and radix-8 butterfly elements," NorChip99, Oslo, Norway, Nov. 8-9, 1999.		[pdf]

M. Vesterbacka, "A 14-transistor CMOS full adder with full voltage-swing nodes," Proc. IEEE Workshop Signal Processing Systems, SIPS'99, Taipei, Taiwan, Oct. 20-22, 1999.		[pdf]

W. Li and L. Wanhammar, "A Pipeline FFT Processor," Proc. IEEE Workshop Signal Processing Systems, SIPS'99, Taipei, Taiwan, Oct. 20-22, 1999.		[pdf]

O. Gustafsson and L. Wanhammar, "Maximally Fast Scheduling of Bit-Serial Lattice Wave Digtial Filters Using Constrained Third-Order Sections," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Pafos, Cyprus, Sept. 5-8, 1999, pp. 729-732.		[pdf]

W. Li and L. Wanhammar, "A complex multiplier using 'Overturned-stairs' adder tree," in Proc. IEEE Int. Conf. Electronics Circuits Syst., ICECS, Paphos, Cyprus, Sept. 5-8, 1999.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar. "A design procedure for two-channel mixed analog and digital filter banks for A/D conversion using minimax optimization, in Proc. IEEE Int. Conf. Electronics Circuits Syst., Pafos, Cyprus, Sept. 5-8, 1999.		[pdf]

H. Ohlsson, H. Johansson, and L. Wanhammar. "Implementation of a combined high-speed interpolation and decimation wave digital filter, in Proc. IEEE Int. Conf. Electronics Circuits Syst., Pafos, Cyprus, Sept. 5-8, 1999, pp. 721-724.		[pdf]

Y. Ma and L. Wanhammar, "A simple control for FFT coefficient access," Proc. European Conf. on Circuit Theory and Design (ECCTD'99), Stresa, Italy, Aug. 29 - Sept.2, 1999.

H. Johansson, "An approach to increase the maximal sample frequency of lattice wave digital filters based on circulators and Richards' structures," in Proc. European Conf. Circuit Theory Design, Stresa, Italy, Aug. 29-Sept. 2, 1999.		[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "On the frequency-response of M-channel mixed analog and digital maximally decimated filter banks," in Proc. European Conf. Circuit Theory Design, Stresa, Italy, Aug. 29-Sept. 2, 1999.

H. Johansson, "A class of high-speed approximately linear-phase recursive digital filters based on the frequency-response masking approach," in Proc. Midwest Symp. Circuits Syst., Las Cruces, New Mexico, USA, Aug. 8-11, 1999.	[Abstract]	[pdf]

P. Löwenborg, H. Johansson, and L. Wanhammar, "A class of two-channel hybrid analog/digital filter banks, in Proc. Midwest Symp. Circuits Syst., Las Cruces, New Mexico, USA, Aug. 8-11, 1999.	[Abstract]	[pdf]

M. Vesterbacka, "A new six-transistor CMOS XOR circuit with complementary output," Proc. IEEE Midwest Symp. Circuits Systems, MWSCAS'99, Las Cruces, New Mexico, Aug. 8-11, 1999.	[Abstract]	[pdf]

Y. Ma and L. Wanhammar; "A coefficient access control for low power FFT processors," 42nd IEEE Midwest Symp. on Circuits and Systems, Vol. 1, pages 512 -514, Aug. 8-11, 1999.	[Abstract]	[pdf]

J. Wikner, " Simulation and measurement of two 3-5V CMOS Current-Steering DACs," in Proc. of the IEE 3rd international A/D and D/A conf., Glasgow, Scotland, July 28, 1999		[pdf]

H. Johansson and L. Wanhammar, "Filter structures composed of allpass and FIR filters for interpolation and decimation by a factor of two," IEEE Trans. Circuits Syst. II, vol. 46, no. 7, pp. 896-905, July 1999.		[pdf]

H. Johansson and L. Wanhammar, "Wave digital filter structures for high-speed narrow-band and wideband filtering," IEEE Trans. Circuits Syst. II, vol. 46, no. 6, pp. 726-741, June 1999.		[pdf]

H. Johansson and L. Wanhammar, "High-speed recursive digital filters based on frequency masking techniques," in Proc. National Conf. Radio Science (RVK), Karlskrona, Sweden, June 14-17, 1999, vol. 1, pp. 357-361.		[pdf]

C. Larsson, O. Gustafsson, M. Vesterbacka, and L. Wanhammar, "A tool for manual scheduling of DSP algorithms implemented in Java," Proc. National Conf. Radio Science, RVK'99, pp. 367-369, Karlskrona, Sweden, June 14-17, 1999.		[pdf]

W. Li and L. Wanhammar, "VHDL code generator for a complex multiplier," in Proc. National Conf. Radio Science RVK, Karlskrona, Sweden, June 14-17, 1999.		[pdf]

P. Löwenborg, O. Gustafsson, and L. Wanhammar, "Filter Design Using MATLAB," in Proc. National Conf. Radio Science (RVK), Karlskrona, Sweden, June 14-17, 1999, pp. 374-378.

J. Wikner, " Design and implementation of current-steering CMOS DACs," in Proc. of RVK'99 (Radiovetenskapskonferensen), Karlskrona, Sweden, June 14-17 1999.

M. Vesterbacka, K. Palmkvist, and L. Wanhammar, "A CAD tool for synthesis of maximally fast lattice wave digital filters," Proc. National Conf. Radio Science, RVK'99, vol. 1, pp. 456-460, Karlskrona, Sweden, June 14-17, 1999.

H. Johansson, "Multirate single-stage and multistage structures for high-speed recursive digital filtering," in Proc. IEEE Int. Symp. Circuits Syst., Orlando, Florida, May 30-June 2, 1999, vol. 3, pp. 291-294.		[pdf]

H. Johansson and T. Saramäki, "A class of complementary IIR filters," in Proc. IEEE Int. Symp. Circuits Syst., Orlando, Florida, May 30-June 2, 1999, vol. 3, pp. 299-302.		[pdf]

M. Vesterbacka, "A robust differential scan flip-flop," Proc. 1999 Int. Symp. Circuits Systems, ISCAS'99, vol. 1, pp. 334-337, Orlando, Florida, May 30-June 2, 1999.		[pdf]

O. Gustafsson and L. Wanhammar, "Implementation of Maximally Fast Ladder Wave Digital Filters Using a Numerically Equivalent State-Space Representation," in Proc. IEEE Int. Symp. Circuits Syst., Orlando, Florida, May 30-June 2, 1999, vol. 3, pp. 419-422.		[pdf]

Y. Gao, J. J. Wikner, and H. Tenhunen, " Design and Analysis of an Oversampling D/A Converter for DMT-ADSL Systems," in Proc. of the 3rd analog VLSI workshop, AVLSIWS'99, Taiwan, May, 1999.		[pdf]

J. Wikner and N. Tan, " Modeling of CMOS Digital-to-Analog Converters for Telecommunication," IEEE Transactions on Circuits and Systems II, May 1999.		[pdf]

L. Wanhammar, (Invited Paper), Design of low-power digital filters, Itern. Workshop on Intelligent Communication Technologies and Applications, With Emphasis on Mobile Communications, COST 254, Neuchâtel, Switzerland, May 5-7, 1999.		[pdf]

Y. Ma, "An Effective Memory Addressing Scheme for FFT Processors," IEEE Trans. on Signal Processing, 47(3):907-911, March 1999.		[pdf]

H. Johansson and T. Saramäki, "Two-channel FIR filter banks based on the frequency-response masking approach," in Proc. Second Int. Workshop Transforms Filter Banks, Brandenburg an der Havel, Germany, Mar. 5-7, 1999.		[pdf]

H. Johansson and L. Wanhammar, "High-speed recursive filter structures composed of identical allpass subfilters for interpolation, decimation, and QMF banks with perfect magnitude reconstruction," IEEE Trans. Circuits Syst. II, vol. 46, no. 1, pp. 16-28, Jan. 1999.		[pdf]

J. Wikner and N. Tan, " Influences of Circuit Imperfections on the Performance of DACs, " Analog Integrated Circuits and Signal Processing, No. 1, Jan. 1999		[pdf]

1998

J. Wikner, Y. Gao, and N. Tan, "D/A Conversion Interface Design for DMT-ADSL Applications," IEEE Magazine of Circuits & Devices, Nov. 1998		[pdf]

M. Karlsson-Rudberg, Martin Sandberg, and Kent Ekholm, "Design and Implementation of an FFT Processor for VDSL," Proc. IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS `98, Chiangmai, Thailand, Nov. 1998.

H. Johansson and L. Wanhammar: A Filter Structure Based on the Frequency-Response Masking Approach for High-Speed Recursive Filtering, IEEE Nordic Signal Processing Symp., NORSIG-98, pp. 165-168, Denmark, June 8-11, 1998.	[postscript] (1216k)	[pdf]

M. Vesterbacka, H. Johansson, K. Palmkvist, and L. Wanhammar, "Implementation of narrow-band lattice wave digital filters," Proc. IEEE Nordic Signal Processing Symp., NORSIG'98, pp. 153-156, Denmark, June 8-11, 1998.	[postscript] (1464k)	[pdf] (120k)

O. Gustafsson: A digit-serial polynomial basis GF(2^m) multiplier, IEEE Nordic Signal Processing Symp., NORSIG-98, Denmark, June 8-11, 1998.		[pdf] (49k)

J. Wikner and N. Tan: Modelling of CMOS digital-to-analog converters for telecommunication in Proc. IEEE Symposium on Circuits and Systems 1998, ISCAS'98, Monterey, USA, May 30 - June 3, 1998		[pdf]

M. Gustavsson, and N. Tan, "On the dynamic performance of high-speed ADC architectures," in Proc. IEEE Symposium on Circuits and Systems 1998, ISCAS'98, Monterey, USA, May 30 - June 3, 1998		[pdf]

H. Johansson and L. Wanhammar: Filter Structures Composed of Allpass and FIR Filters for Interpolation and Decimation with Factors of Two, IEEE Intern. Symp. on Circuits and Systems, ISCAS-98, Monterey, California, May 31-June 3, 1998.	[postscript] (2080k)	[pdf]

H. Johansson and L. Wanhammar: Digital Hilbert Transformers Composed of Identical Allpass Subfilters, IEEE Intern. Symp. on Circuits and Systems, ISCAS-98, Monterey, California, May 31-June 3, 1998.	[postscript] (2352k)	[pdf]

M. Karlsson, M. Vesterbacka, and L. Wanhammar, "Low-swing charge recycle bus drivers," IEEE Int. Symp. Circuits Systems, ISCAS'98, Monterey, CA, USA, May 31 - June 3, 1998		[pdf]

M. Karlsson, O. Gustafsson, J. J. Wikner, T. Johansson, W. Li, M. Hörlin, and H. Ekberg, "Understanding multiplier design using `overturned-stairs' adder trees," LiTH-ISY-R-2016, Linköping University, Sweden, Feb. 1998.		[pdf]

1997

H. Johansson and L. Wanhammar: A Digital Filter Structure Composed of Allpass Filters and an FIR Filter and for Wideband Filtering, The Fourth IEEE Intern. Conf. on Electronics, Circuits, Systems, ICECS'97, Vol. 1, pp. 249-253, Cairo, Egypt, Dec. 15-18, 1997. LiTH-ISY-R-1978.	[postscript]	[pdf]

M. Karlsson, M. Vesterbacka, and L. Wanhammar, "Implementation of bit-serial adders using robust differential logic," Proc. IEEE Nordic Event in ASIC Design Conf., NORCHIP'97, Tallin, Estonia, Nov 10-11, 1997.	[postscript] (565K)	[pdf]

J. Wikner, and N. Tan: "Influence of Circuit Imperfections on the Dynamic Performance of DACs," NORCHIP'97, Tallin, Estonia, Nov 10-11, 1997.	[postscript] (264K)	[pdf]

M. Karlsson, M. Vesterbacka, and L. Wanhammar, "Design and implementation of a complex multiplier using distributed arithmetic," Proc. IEEE Workshop Signal Processing Systems, SIPS'97, Leicester, England, Nov 3-5, 1997.		[pdf]

M. Karlsson, M. Vesterbacka, and L. Wanhammar, "Novel low-swing bus-drivers and charge-recycle architechtures," Proc. IEEE Workshop Signal Processing Systems, SIPS'97, Leicester, England, Nov 3-5, 1997.		[pdf]

K-G Andersson, M. Karlsson-Rudberg, and Anders Wass, "Design of a JPEG DSP Using the Modular Digital Signal Processor Methodology," Proc. Intern. Conf. on Signal Processing Applications and Technology, ICSPAT`97, San Diego, CA, USA, Sep. 14-17, 1997.

N. Tan, and J. Wikner: "A CMOS Digital-to-Analog Converter Chipset for Telecommunication," IEEE Magazine on Circuits and Devices, September 1997. (No final version).	[postscript] (200K)	[pdf]

H. Johansson and L. Wanhammar: High-Speed Recursive Filter Structures for Interpolation and Decimation with Factors of Two, European Conf. on Circuit Theory and Design, ECCTD-97, Budapest, Hungary, Vol. 2, pp. 555-560, Aug. 31-Sept. 3, 1997. LiTH-ISY-R-1966.	[postscript]	[pdf]

H. Johansson and L. Wanhammar: Filter Structures Composed of Allpass Subfilters for High-Speed Narrow-Band and Wideband Filtering, European Conf. on Circuit Theory and Design, ECCTD-97, Budapest, Hungary, Vol. 2, pp. 561-566, Aug. 31-Sept. 3, 1997. LiTH-ISY-R-1967.	[postscript]	[pdf]

M. Gustavsson, and N. Tan, " New current-mode pipeline A/D converter architectures," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS'97,Vol. 1, pp. 417 - 420, Hong Kong, June 9-12, 1997.		[pdf]

H. Johansson and L. Wanhammar: High-Speed Recursive Filtering Using the Frequency-Response Masking Approach, IEEE Intern. Symp. on Circuits and Systems, ISCAS'97,Vol. 4, pp. 2208-2211, Hong Kong, June 9-12, 1997. LiTH-ISY-R-1931.	[postscript]	[pdf]

T. Widhe, J. Melander, L. Wanhammar: Design of efficient radix-8 butterfly PEs for VLSI, IEEE Intern. Symp. on Circuits and Systems, ISCAS'97,Vol. 3, pp. 2084-2087, Hong Kong, June 9-12, 1997.	[postscript]	[pdf]

M. Karlsson-Rudberg, and L. Wanhammar, "High Speed Pipelined Parallel Huffman Decoding," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS'97, Hong Kong, June 9-12, 1997.		[pdf] (182K)

H. Träff, and J. Wikner: "Snapshot Sampling for Ultra High Speed Data Acquisition," Electronics Letters 19th June 1997, Vol. 33, No. 13.	[postscript] (171K)	[pdf]

M. Karlsson, M. Vesterbacka, and L. Wanhammar, "A robust differential logic style with NMOS logic nets," Proc. IEE Int. Workshop Signal Processing, IWSSIP'97, Poznan, Poland, May 28-30, 1997	[postscript] (519K)	[pdf]

H. Johansson, K. Palmkvist, L. Wanhammar: Design and Implementation of a High-Speed Interpolator and Decimation Filter, European Microelectronics Application Conf., EMAC-97, pp. 97-100, Barcelona, Spain, May 28-30, 1997.	[postscript] (855k)	[pdf]

H. Johansson and L. Wanhammar: Design of Linear-Phase Lattice Wave Digital Filters, LiTH-ISY-R-1930, Linköping University, Sweden, March 1997.	[postscript] (712K)	[pdf] (246K)

1996

M. Gustavsson and N. Tan: A new pipeline A/D converter architecture and its low-voltage implementation for DECT, in Proc. IEEE Norchip'96, Helsinki, Finland, pp. 114-121, Nov. 1996.

M. Vesterbacka, K. Palmkvist and L. Wanhammar, "A comparison of three lattice wave digital filter implementations," Proc. Int. Conf. Signal Processing Applications Technology, ICSPAT'96, Boston, MA, October 8-10, pp. 1909-1913, 1996. LiTH-ISY-R-1864.		[pdf]

M. Karlsson, T. Widhe, J. Melander, and L. Wanhammar: Comparison of Three Complex Multipliers, IEEE Proc. ICSPAT´96, Boston, MA, October 8-10, pp. 1899-1903, 1996.	[postscript] (525K)

H. Johansson and L. Wanhammar: High-Speed Narrow-Band Lattice Wave Digital Filters, ICECS 96, Rodos, Greece, Oct. 14-16, pp. 390-393, 1996.	[postscript] (789K)

J. Melander, T. Widhe, and L. Wanhammar: Design of an 128-Point FFT Processor for OFDM Applications, ICECS 96, Rhodos, Greece, Oct. 14-16, pp. 828-831, 1996, LiTH-ISY-R-1867.	[postscript] (910K)

M. Vesterbacka, K. Palmkvist and L. Wanhammar, "Sign-extension and quantization in bit-serial digital filters," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'96, Rodos, Greece, Oct. 14-16, pp. 394-397, 1996. LiTH-ISY-R-1863.		[pdf]

K. Palmkvist, M. Vesterbacka, and L. Wanhammar, "Implementation of static DSP algorithms using multiplexed PE:s," Proc. IEEE Int. Conf. Electronics, Circuits, Systems, ICECS'96, Rodos, Greece, Oct. 14-16, pp. 824-827, 1996.		[pdf]

M. Karlsson-Rudberg and L. Wanhammar: Implementation of a Fast MPEG-2 Compliant Huffman Decoder, Proc. EUSIPCO ´96, Trieste, Italy, September 1996. LiTH-ISY-R-1839		[pdf] (348K)

H. Johansson and L. Wanhammar: Two-Stage Polyphase Interpolators and Decimators for Sample Rate Conversions with Prime Numbers, VIII European Signal Processing Conf., Trieste, Italy, Sept. 1996. LiTH-ISY-R-1846..	[postscript] (639K)

M. Karlsson-Rudberg and L. Wanhammar: Design and Implementation of an Inverse Quantizer for the MPEG-2 Algorithm, Linköping University. LiTH-ISY-R-1838.

M. Karlsson-Rudberg and L. Wanhammar: An MPEG-2 Video Decoder DSP Architecture, IEEE Proc. DSPWS ´96, Loen, Norway, September 2-4, pp. 199-202, 1996. LiTH-ISY-R-1857.	[postscript] (661K)

M. Vesterbacka, K. Palmkvist and L. Wanhammar, "Maximally fast, bit-serial lattice wave digital filters," Proc. IEEE DSP Workshop '96, DSPWS'96 Loen, Norway, September 2-4, pp. 207-210, 1996. LiTH-ISY-R-1862.		[pdf]

H. Johansson and L. Wanhammar: High-Speed Wide-Band Lattice Wave Digital Filters, NORSIG 96, Espoo, Finland, Sept. 24-27, pp. 355-358, 1996. LiTH-ISY-R-1887.	[postscript]

H. Johansson and L. Wanhammar: An Algorithm for the Adaptor Coefficients of Richards Structures, NORSIG 96, Espoo, Finland, Sept. 24-27, pp. 351-354, 1996. LiTH-ISY-R-1886.	[postscript]

J. Melander, T. Widhe, and L. Wanhammar: A Radix-r FFT/IFFT Architecture with Distributed Control Unit, NORSIG 96, Espoo, Finland, Sept. 24-27, pp. 387-390, 1996.	[postscript] (2.4M)

K. Palmkvist, M. Vesterbacka, and L. Wanhammar: "Arithmetic transformations for fast bit-serial VLSI implementations of recursive algorithms," Proc. Nordic Signal Processing Symp., NORSIG'96, Espoo, Finland, Sept. 24-27, pp. 391-394, 1996.		[pdf]

M. Vesterbacka, K. Palmkvist, and L. Wanhammar: "High-speed multiplication in bit-serial digital filters," Proc. Nordic Signal Processing Symp., NORSIG'96, Espoo, Finland, Sept. 24-27, pp. 179-182, 1996.		[pdf]

M. Vesterbacka, K. Palmkvist, and L. Wanhammar: "Maximally fast lattice wave digital filters". LiTH-ISY-R-1860.

M. Gustavsson and N. Tan: A complete analog interface for current mode A/D converters in a digital CMOS process, in Proc. IEEE NORSIG'96, Espoo, Finland, Sept. 24-27, pp. 159-162, 1996.

H. Johansson and L. Wanhammar: Design of Bireciprocal Linear-Phase Lattice Wave Digital Filters, Report LiTH-ISY-R-1877, Linköping University, Sweden, Aug. 1996.	[postscript] (697K)	[pdf] (201K)

M. Vesterbacka, K. Palmkvist and L. Wanhammar, "On implementation of fast, bit-serial loops," 1996 Midwest Symp. Circuits Systems, Proc. IEEE Midwest Symp. on Circuits and Systems, MWSCAS'96, Ames, Iowa, August 18-21, 1996.		[pdf]

J. Melander, T. Widhe, K. Palmkvist, M. Vesterbacka, and L. Wanhammar: An FFT processor based on the SIC architecture with asynchronous PE, IEEE Proc. of 1996 Midwest Symp. on Circuits and Systems, Ames, Iowa, August 18-21, 1996. LiTH-ISY-R-1878.		[pdf]

L. Wanhammar (Invited paper): Directions in Embedding DSP Functionalities, National Conference on Radio Science (RVK-96), Luleå, Sweden, June 3-6, pp. 42-46, 1996.

T. Widhe, J. Melander, and L. Wanhammar: Implementation of a Bit-serial Butterfly PE, National Conference on Radio Science (RVK-96), pp. 564-568, Luleå, Sweden, June 3-6, 1996. LiTH-ISY-R-1849.	[postscript] (932K)

M. Karlsson-Rudberg and L. Wanhammar: System Design with Mentor Graphics' Tools, National Conference on Radio Science (RVK-96), Luleå, Sweden, June 3-6, pp. 528-532, 1996.	[postscript] (745K)

M. Vesterbacka, K. Palmkvist and L. Wanhammar, "Serial squarers and serial/serial multipliers," Proc. National Conf. Radio Science, RVK'96, pp. 518-522, Luleå University of Technology, Luleå, Sweden, June 3-6, 1996. LiTH-ISY-R-1859.		[pdf]

K. Palmkvist, M. Vesterbacka and L. Wanhammar, "Use of computer simulations in ASIC system design," Proc. National Conf. Radio Science, RVK'96, pp. 513-517, Luleå University of Technology, Luleå, Sweden, June 3-6, 1996.		[pdf]

H. Johansson, K. Palmkvist, M. Vesterbacka and L. Wanhammar, "High-speed lattice wave digital filters for interpolation and decimation," Proc. National Conf. Radio Science, RVK'96, pp. 543-547, Luleå, Sweden, June 3-6, 1996..		[pdf]

M. Karlsson-Rudberg and L. Wanhammar: New Approaches to High Speed Huffman Decoding, ISCAS-96, Atlanta, USA, May 12-15, vol 2, pp. 149-152, 1996, LiTH-ISY-R-1814.	[postscript] (480K)

1995

L. Wanhammar: System Design of DSP Integrated Circuits, DAK-forum, Oct. 4 , Trondheim, 1995.

L. Wanhammar: A DSP Archtecture With Bit-Serial Processing Elements, DAK-forum, Oct. 4 , Trondheim, 1995.

N. Tan, "A 1.2-V 0.8-mW SI DS A/D converterin standard digital CMOS process," In Proc. 21st European Solid-State Circuits Conference (ESSCIRC«95), Lille, France, pp. 150-153, Sept. 1995.

K. Palmkvist, M. Vesterbacka, P. Sandberg, L. Wanhammar, "Scheduling of data-independent recursive algorithms," Proc. European Conf. Circuit Theory and Design, ECCTD'95, vol. 2, pp. 855-858, Istanbul, Turkey, Aug. 27-31, 1995, LiTH-ISY-R-1769.		[pdf] (202K)

J. Melander, T. Widhe, P. Sandberg, K. Palmkvist, M. Vesterbacka, L. Wanhammar, "Implementation of a bit-serial FFT processor with a hierarchical control structure," Proc. European Conf. Circuit Theory and Design, ECCTD'95, vol. 1, pp. 423-426, Istanbul, Turkey, Aug. 27-31, 1995, LiTH-ISY-R-1779.		[pdf] (215K)

P. Sandberg, L. Wanhammar: A Novel Implementation of the Viterbi Algorithm Using the SIC Architecture, LiTH-ISY-R-1781.

N. Tan and S. Eriksson, "A low-voltage switched-current delta-sigma modulator," IEEE J. Solid-State Circuits, vol. 30, pp. 599-603, May 1995.		[pdf] (388 KB)

N. Tan, "On Switched-current DS A/D converters," In Proc. IEEE International Symposium on Circuits and Systems (ISCAS'95), Seattle, USA, vol. 3, pp.2071-2074, May, 1995.	[Abstract]	[pdf]

K. Palmkvist, P. Sandberg, M. Vesterbacka, L. Wanhammar, "Digital IF filter for mobile radio," Proc. Nordic Radio Symp., NRS'95, Saltsjöbaden, Sweden, April 24-27, 1995, LiTH-ISY-R-1768.		[pdf]

N. Tan and S. Eriksson, "Low-voltage low-power switched-current circuits and systems," in Proc. European Design and Test Conference, Paris, France, pp. 100-104, March 1995.		[pdf] (476 KB)

N. Tan, "Fourth order SI delta-sigma modulators for high frequency applications," Electronics Lett., pp. 333-334, 2 March 1995.		[pdf]

N. Tan, "Switched-current oversampling converters," IEEE Circuits and Devices Magazine, pp. 36-38, Jan. 1995.	[Abstract]	[pdf]

1994

N. Tan and S. Eriksson: Low-voltage fully differential class-AB SI circuits with common-mode feedforward, Electronics Lett., pp. 2090-2091, 8 Dec. 1994.		[pdf] (218 KB)

A. Ladjemi, M. Mokhtari, H. Tenhunen and N. Tan: 1 GHz sampling switched-current 2nd order sigma-delta modulator, in Proc. 12th Norchip Seminar, Gothenburg, Sweden, pp. 189-190, Nov. 8-9, 1994.

N. Tan:Switched-current delta-sigma A/D converters, invited paper, in Proc. 12th Norchip Seminar, Gothenburg, Sweden, pp. 8-15, Nov. 8-9, 1994.

P. Sandberg, K. Palmkvist, and L. Wanhammar: Some Experiences From Automatic Synthesis of Digital Filters, Proc. NorChip-94, Göteborg, Seden, Nov. 8-9, 1994, LiTH-ISY-R-1699.

N. Tan, B. Jonsson and S. Eriksson: 3.3-V 11-bit delta-sigma modulator using first-generation SI circuits, Electron. Lett., pp. 1819-1821, 27 Oct. 1994.		[pdf]

N. Tan and S. Eriksson: Low-power chip-to-chip communication circuits, Electron. Lett., pp. 1732-1733, 13 Oct. 1994.		[pdf] (220 KB)

N. Tan and S. Eriksson: A comparison design of delta-sigma modulators, In Proc. 37th Midwest Sym. Circuits and Systems, Louisiana, USA, Aug. 1994.		[pdf] (760 KB)

H. Träff and S. Eriksson: 2V High Speed Low Power Small Area Low Conductance Class AB Fully Differential Switched Current System Cells" Proc. of Intl. SBMICRO'94, Rio de Janeiro, p.1549-52, Aug. 1994.

N. Tan, S. Eriksson and L. Wanhammar: Bit-Serial VLSI Design of Decimation Comb Filters for Oversampling A/D Converters, LiTH-ISY-R-1593.

N. Tan, S. Eriksson and L. Wanhammar: An Approach to Save Power and Reduce Chip Area for Bit-Serial DSP ASICs, LiTH-ISY-R-1594

P. Sandberg, K. Palmkvist, L. Wanhammar and R. Gustavsson: Synthesis of the SIC Architecture from VHDL, LiTH-ISY-R-1610.

P. Sandberg and L. Wanhammar: Low-Power Design With Synthesis Tools, LiTH-ISY-R-1649.

M. Vesterbacka, K. Palmkvist, P. Sandberg and L. Wanhammar: "Implementation of fast bit-serial lattice wave digital filters," Proc. IEEE Int. Symp. Circuits Systems, ISCAS'94, Vol. 2, pp. 113-116, London, May 30-June 1, 1994. LiTH-ISY-R-1576.		[pdf]

N. Tan, S. Eriksson and L. Wanhammar: A Novel Bit-Serial Design of Comb Filters for Oversampling A/D Converters, Proc. of IEEE Intern. Symposium on Circuits and Systems, ISCAS-94, Vol. 4, pp. 4.259-4.262, London, May 30-June 1, 1994.		[pdf] (356 KB)

H. Träff and S. Eriksson: Audio sigma-delta modulator implementation using class AB compact switched current memory cells, IEEE International Symposium on Ciruits and Systems -94, vol. 5, pp. 589-92, London, May 30-June 1, 1994.		[pdf]

N. Tan, S. Eriksson and L. Wanhammar: A Power Saving Technique for Bit-Serial DSP ASICs, Proc. of IEEE Intern. Symposium on Circuits and Systems, ISCAS-94, Vol. 4, pp. 4.51-4.54, London, May 30-June 1, 1994.		[pdf] (372 KB)

B. Jonsson and S. Eriksson: A low voltage wave SI filter implementation using improved delay elements, 1994 IEEE International Symposium on Circuits and Systems, London, UK, vol.5, p.305-8, May 30-June 1, 1994.		[pdf]

N. Tan and S. Eriksson: A two-stage decimation filter design technique for oversampling DeltaSigma A/D converters, In Proc. IEEE International Symposium on Circuits and Systems (ISCAS'94), London, UK, Vol. 2, pp. 513-516, May 30-June 1, 1994.		[pdf]

N. Tan and S. Eriksson: A fully differential switched-current delta-sigma modulator using a single 3.3-V power-supply voltage, In Proc. IEEE International Symposium on Circuits and Systems (ISCAS'94), London, UK, Vol. 5, pp. 485-588, May 30-June 1, 1994.		[pdf] (348 KB)

H. Träff and S. Eriksson: Novel pseudo-class AB fully differential 3V switched current system cells, Electronics-Letters. vol.30, no.7, p.536-731, 31 March 1994.		[pdf] (227 KB)

K. Palmkvist, M. Vesterbacka, P. Sandberg and L. Wanhammar: "Maximally fast recursive algorithms," Proc. Nat. Symp. Microwave Technique and High Speed Electronics, GIGAHERTZ'94, Linköping, 22-23 March, 1994.		[pdf] (84K)

M. Vesterbacka, K. Palmkvist and P. Sandberg, L. Wanhammar, "Implementation of fast DSP algorithms using bit-serial arithmetic," Linköping, Proc. Nat. Conf. Electronic Design Automation, EDATRÄFF'94, Stockholm, March 15, 1994. LiTH-ISY-R-1577.		[pdf] (496K)

P. Nilsson, M. Torkelson, K. Palmkvist, M. Vesterbacka and L. Wanhammar, "A bit-serial CMOS digital IF-filter for mobile radio using an on-chip clock," Proc. Int. Zurich Seminar on Digital Communications, Zurich, Switzerland, pp. 510-521, March 8-11, 1994, LiTH-ISY-R-1656.

1993

N. Tan and S. Eriksson, "New multibit delta-sigma modulator structure with reduced sensitivity to the D/A conversion error," Proc. IEE Part G, pp. 444-448, Dec., 1993.

P. Nilsson, M. Torkelson, M. Vesterbacka, L. Wanhammar, "A bit-serial realization of a lattice wave digital intermediate frequency filter," Proc. 6th Annual IEEE Int. ASIC Conf. and Exhibit, ASIC'93, Rochester, New York, Sept. 27-Oct. 1, 1993. LiTH-ISY-R-1495.		[pdf]

N. Tan and S. Eriksson, "New modeling method for 1-bit delta-sigma modulators," in Proc. 11th European Conf. Circuit Theory and Design, Davos, Switzerland, pp. 1361-1366, Sept. 1993.

N. Tan and S. Eriksson, "High-frequency switched-capacitor circuits without operational amplifiers," in Proc. 11th European Conf. Circuit Theory and Design, Davos, Switzerland, pp. 711-716, Sept. 1993.

P. Nilsson, M. Torkelson, M. Vesterbacka, L. Wanhammar, "A high performance bit-serial lattice wave digital intermediate frequency filter chip," Proc. European Conf. Circuit Theory and Design, ECCTD'93, Davos, Switzerland, Aug. 30 - Sept. 3, 1993. LiTH-ISY-R-1494.

H. Träff, and S. Eriksson, "Class A and AB compact switched current memory circuits," Electronics Letters, vol. 29, Issue 16, 5 Aug. 1993, pp. 1454-5.		[pdf]

B. Jonsson, and S. Eriksson: 'New Clock-Feedthrough Compensation Scheme for Switched-Current Circuits', Electron. Lett., Vol 29, No 16, pp. 1446-1447, 5 Aug. 1993.		[pdf]

S. Eriksson, B. Jonsson, N. Tan, and H. Träff: "Analog and discrete-time integrated circuits for signal processing," Proceedings of NUTEK Conference on Digital Communication/Telecommunication, Royal Institute of Technology - Electrum, Kista, Sweden, June 1993, pp. 42-43.

N. Tan and S. Eriksson, "Forth-order two-stage delta-sigma modulator using both 1 bit and multibit quantisers," Electron. Lett., pp. 937-938, 27 May 1993.		[pdf]

B. Jonsson, and S. Eriksson: 'Current-Mode N-port Adaptors for Wave SI Filters', Electron. Lett., Vol 29, No 10, pp. 925-926, 13 May 1993.		[pdf]

M. Vesterbacka, K. Palmkvist, L. Wanhammar, "Realization of serial/parallel multipliers with fixed coefficients," Proc. National Conf. Radio Science, RVK'93, pp. 209-212, Lund Institute of Technology, Lund, Sweden, April 5-7, 1993. LiTH-ISY-R-1484.

K. Palmkvist, M. Vesterbacka, L. Wanhammar, "Design and implementation of an interpolator using wave digital filters," Proc. National Conf. Radio Science, RVK'93, pp. 205-208, Lund Institute of Technology, Lund, Sweden, April 5-7, 1993. LiTH-ISY-R-1485.		[pdf] (138K)

N. Tan and S. Eriksson, "Oversampling delta-sigma modulation for A/D converters and its circuit realization," in Proc. Radio-Scientific Conference (RVK-93), Lund, Sweden, pp. 169-172, April 1993.

N. Tan, H. Träff, B. Jonsson, and S. Eriksson, "Current-mode approach for signal processing," in Proc. Radio-Scientific Conference (RVK-93), pp. Lund, Sweden, 173-176, April 1993.

P. Nilsson, M. Torkelson, M. Vesterbacka, L. Wanhammar, "CMOS on-chip clock for digital signal processors," IEE Electronics Letters, vol. 29, no. 8, pp. 669-670, April 1993. LiTH-ISY-R-1491.		[pdf]

P. Nilsson, M. Torkelson, M. Vesterbacka, L. Wanhammar, "A lattice wave digital intermediate frequency filter chip," Proc. National Conf. Radio Science, RVK'93, pp. 197-200, Lund Institute of Technology, Lund, Sweden, April 5-7, 1993. LiTH-ISY-R-1492.

N. Tan, S. Eriksson, L. Wanhammar: A Power-Saving Technique for Bit-Serial DSP ASICs, LiTH-ISY-R-1545.

N. Tan and S. Eriksson, "Delta-sigma modulators using unity-gain buffers," Electron. Lett., pp. 478-579, 4 Mar., 1993.		[pdf]

N. Tan and S. Eriksson, "Switched-capacitor circuits using delay-line elements," Electron. Lett., pp. 159-160, 21 Jan., 1993.		[pdf]

1992

N. Tan and S. Eriksson, "Noise shaping with bilinear integrators," in Proc. 35th Midwest Sym. Circuits Sys., Washington D.C., USA, pp. 1392-5, Aug. 1992.

N. Tan and S. Eriksson, "Second-order delta-sigma modulator with two 1 bit quantisers," Electron. Lett., pp. 1486-1488, 30 July 1992.		[pdf]

K. Palmkvist, M. Vesterbacka, E. Nordhamn, and L. Wanhammar, "A fast bit-serial lattice wave digital filter," Proc. Workshop on Digital Communications,, pp. 88-92, Uppsala University, Sweden, May 25-26, 1992. LiTH-ISY-R-1483.		[pdf] (120K)

S. Eriksson, T. Holmberg, B. Jonsson, N. Tan, and H. Träff: "Analog and discrete-time integrated circuits for signal processing - recent work," Poster and Proceedings of Workshop on Digital Communications, Uppsala University, May 25-26, 1992, pp. 114-117.

S. Eriksson, T. Holmberg, B. Jonsson, N. Tan, and H. Träff: "Analog and discrete-time integrated circuits for signal processing," Proceedings of Workshop on Digital Communications, Uppsala University, May 25-26, 1992, pp. 56-59.

E. Nordhamn, K. Palmkvist, L. Wanhammar, P. Nilsson, and M. Torkelsson: Implementation of a Digital MF-Filter, Nordic Radio Symposium, Luleå, Sweden, April 2-3, 1992. LiTH-ISY-R-1482.

K. Palmkvist, M. Vesterbacka, L. Wanhammar, and M. Torkelsson, "A general framework for high-performance DSP systems with low power consumption," Dept. of Elec. Eng., Linköping University, Sweden, 1992.

H. Träff, "Novel approach to high speed CMOS current comparators," Electronics Letters, vol. 28, 30 Jan. 1992, pp. 310-312.		[pdf]

N. Tan and S. Eriksson, "High performance voltage delay lines using switched-current memory cells," Electron. Lett., pp. 228-229, 30 Jan. 1992.		[pdf]

E. Nordhamn, B. Sikström, and L. Wanhammar: Design of an FFT Processor, Fourth Swedish Workshop on Computer System Architecture, DSA-92, Linköping,Sweden, Jan. 13-15, 1992. LiTH-ISY-I-1314.

E. Nordhamn, B. Sikström, L. Wanhammar, E. Hertz, and U. Sjöström, "Shared-Memory Architectures with Bit-Serial PEs," Fourth Swedish Workshop on Computer System Architecture, DSA-92, Linköping, Sweden, Jan. 13-15, 1992. LiTH-ISY-I-1315.

Selected papers before 1992

L. Wanhammar: A Bound on the Passband Deviation for Symmetric and Antimetric Commensurate, Transmission Line Filters, 1991, LiTH-ISY-R-1516.		[pdf]

J.J.F. Rijns, S. Eriksson "Comment on `realisation of switched capacitor delay lines and Hilbert transformers' and reply" , Electronics-Letters. vol.27, no.22, 24 Oct. 1991, pp. 2042 - 2043.		[pdf]

S. Eriksson "Realisation of switched capacitor delay lines and Hilbert transformers" , Electronics-Letters. vol.27, no.14, p.1262-4,4 July 1991.		[pdf]

H. Träff, T. Holmberg, S. Eriksson, "Application of switched-current technique to algorithmic DA- and AD-converters," Proceedings of ISCAS -91, 11-14 juni, vol. 3, s. 1549-52, 1991.

E. Nordhamn, L. Wanhammar, and B. Sikström, "Design of an FFT Processor," Symp. Signal Processing, Göteborg, Sweden, May 29-30, 1991.		[pdf]

E. Nordhamn, L. Wanhammar, and B. Sikström, "Scheduling and Resource Allocation - A Review," Linköping University, 1990.

L. Wanhammar, "FIR SC Filters," Linköping University, March 1990.		[pdf]

P. Ingelhag, B. Jonsson, B. Sikström and L. Wanhammar, "A High-Speed Bit-Serial Processing Element," Proc. of European Conf. Circuit Theory and Design (ECCTD), University of Sussex, Brighton, UK, pp. 162-165, Sept. 1989.		[pdf]

P. Ingelhag, B. Jonsson, B. Sikström and L. Wanhammar, "A High Speed Multiplier," STU Symp. on Digital Communication, pp. 45-48, May 29-30, 1989, Kista, Sweden..

E. Nordhamn, B. Sikström and L. Wanhammar, "Scheduling of DSP Algorithm," STU Symp. on Digital Communication, pp. 54-57, May 29-30, 1989, Kista, Sweden.

L. Wanhammar, M. Afghahi, and B. Sikström, "On Mapping of DSP Algorithms Onto Hardware," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS-88, Espoo, Finland, June 1988, pp. 1967-1970.

K. Chen, L. Wanhammar, and T. Saramäki, "Wave Digital Ladder Filters with Low Sensitivity and Roundoff Noise," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS-88, Espoo, Finland, June 1988, pp. 547-550.

B. Sikström, L. Wanhammar, M. Afghahi, and J. Pencz, "A High Speed 2-D Discrete Cosine Transform Chip," Integration, the VLSI Journal, Vol. 5, No. 2, June 1987, pp. 159-169.

M. Afghahi, S. Matsumura, J. Pencz, B. Sikström, U. Sjöström, and L. Wanhammar, "An Array Processor for 2-D Discrete Cosine Transforms," Proc. The European Signal Processing Conf., EUSIPCO-86, The Hague, The Netherlands, 2-5 Sept. 1986.

L. Wanhammar, "On Algorithms and Architecture Suitable for Digital Signal Processing," Proc. The European Signal Processing Conf., EUSIPCO-86, The Hague, The Netherlands, 2-5 Sept. 1986, pp.1323-6 vol.2.

B. Sikström, L. Wanhammar, M. Afghahi, and J. Pencz, "A High Speed 2-D Discrete Cosine Transform Chip," Proc. 2nd Nordic Symp. on VLSI in Computers and Communications, VLSI C&C, Linköping, June 2-4, 1986.

L. Wanhammar, B. Sikström, M. Afghahi, and J. Pencz, "A Systematic Bit-Serial Approach to Implement Digital Signal Processing Algorithms, Proc. 2nd Nordic Symp. on VLSI in Computers and Communications, VLSI C&C, Linköping, June 2-4, 1986.

L. Wanhammar, "Algorithms and Architecture Suitable for Digital Signal Processing," April. 1986.		[pdf]

S. Matsumura, B. Sikström, U. Sjöström, and L. Wanhammar, "LSI Implementation of an 8 Point Discrete Cosine Transform," Intern. Conf. on Computers, Systems and Signal Processing, Bangalore, India, Dec. 10-12, 1984.		[pdf]

M. Renfors, B. Sikström, and L. Wanhammar, "CAD Tools For Digital Filter Analysis and Design," Intern. Conf. on Computers, Systems and Signal & Processing, Bangalore, India, Dec. 10-12, 1984.		[pdf]

F. Dinha, B. Sikström, U. Sjöström, and L. Wanhammar, "LSI Implementation of Digital Filters - A Multi-Processor Approach," International Conference on Computers, Systems & Signal Processing, Bangalore, India, Dec. 10-12, 1984		[pdf]

M. Renfors, B. Sikström, U. Sjöström, and L. Wanhammar, "VLSI Implementation of a Digital PCM-Filter,"International Conference on Computers, Systems & Signal Processing, Bangalore, India, Dec. 10-12, 1984		[pdf]

S. Matsumura, M. Renfors, B. Sikström, and L. Wanhammar, "LSI Implementation of Lattice Wave Digital Filters," Intern. Conf. on Digital Signal Processing, pp. 303-307, Florence, Italy, Sept. 5-8, 1984.

T. Kronander, S. Matsumura, B. Sikström, U. Sjöström, and L. Wanhammar, "VLSI Implementation of the Discrete Cosine Transform," Proc. Nordic Symp. on VLSI in Computers and Communications, Tampere, Finland, June 13-16, 1984.

F. Dinha, B. Sikström, U. Sjöström, and L. Wanhammar, "A Multi-Processor Approach to Implement Digital Filters," Nordic Symp. on VLSI in Computers and Communications, Tampere, Finland, June 13-16, 1984.

M. Renfors, B. Sikström, U. Sjöström, and L. Wanhammar, "Design and Implementation of a 32 Channel Wave Digital PCM Filter," Proc. Nordic Symp. on VLSI in Computers and Communications, Tampere, Finland, June 13-16, 1984.

M. Renfors, B. Sikström, U. Sjöström, and L. Wanhammar, "A 32-Channel Digital PCM Filter - Filter Design," National Conf. on Radio Science - RVK84, April 10-12, 1984, Linköping.

M. Renfors, B. Sikström, U. Sjöström, and L. Wanhammar, "A 32-Channel Digital PCM Filter - VLSI Implementation," National Conf. on Radio Science - RVK84, April 10-12, 1984, Linköping.

S. Matsumura, B. Sikström, U. Sjöström, and L. Wanhammar, "A Cosine Transform Chip," National Conf. on Radio Science - RVK84, April 10-12,1984, Linköping.

M. Renfors, B. Sikström, and L. Wanhammar, "An Integrated CAD System for VLSI Implementation of Digital Filters," Proc. Intern. Conf. on VLSI-83, Trondheim, August, 1983.

M. Renfors, B. Sikström, and L. Wanhammar, "LSI Implementation of Limit-Cycle-Free Digital Filters Using Error-Feedback Techniques," European Signal Processing Conf. EUSIPCO-83, Erlangen, Sept. 12-16, 1983.		[pdf]

S. Eriksson, "Design of Parasitics-Insensitive Bilinear Switched-Capacitor Filters - A Flowgraph Conversion Method," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS-82, Rome, Italy, pp. 443-446, May 1982.

B. Sikström, "Some Aspects on the LSI-Implementation of Wave Digital Filters," Proc. Intern. Symp. on Circuits And Systems, Rome, Italy, pp. 780-783, May 10-12, 1982.

L. Wanhammar, "A Comparison of Wave Digital Lowpass Filters From an Implementation Point of View," Proc. IEEE Intern. Symp. on Circuits and Systems, ISCAS-82, Rome, Italy, pp. 776-779, May, 1982.

L. Wanhammar, "Implementation of Wave Digital Filters - A Comparison," Proc. Journees d'Electronique, Lausanne, Switzerland, Oct. 1981.		[pdf]

S. Eriksson,"An approach to wave SC filter implementation," Proc. Journees d'electronique 1981, Lausanne, Switzerland, pp. 263-274, Oct. 1981.

B. Sikström och L. Wanhammar, "En skiftackumulator för digital signalbehandling," National Conference on Radio Science - RVK81, Sept. 1981, Stockholm.

B. Sikström and L. Wanhammar, "A Shift-Accumulator for Signal Processing Applications, Proc. 1981 European Conf. on Circuit Theory and Design, ECCTD-81, The Hague, The Netherlands, Aug. 1981, pp. 919-924,

S. Eriksson, "Realization of synchronous wave switched-capacitor filters," Proc. 1981 European Conf. on Circuit Theory and Design, ECCTD-81, The Hague, The Netherlands, pp. 650-654, Aug. 1981.

S. Eriksson,"An approach to the realization of switched-capacitor filters using the bilinear transformation," Proc. 1981 European Conf. on Circuit Theory and Design, ECCTD-81, The Hague, The Netherlands, pp. 803-807Aug. 1981

T. Fjällbrant, S. Eriksson, and L. Wanhammar, "A speech signal ATC-system with short primary blocklengths and microprocessor-based implementation," Proc. Intern. Conf. on Digital Processing of Signals in Communications, Loughborough, England, April 1981.

B. Sikström, "Implementation of Wave Digital Filters Using Modular Hardware," Proc. Intern. Conf. on Digital Processing of Signals in Communications, Loughborough, England, pp. 37-47, April 1981.

L. Wanhammar, "Implementation of Wave Digital Filters Using Vector-Multipliers," Proc. First European Signal Processing Conf., EUSIPCO-80, Lausanne, Switzerland, pp. 21-26, Sept. 16-19, 1980.		[pdf]

S. Eriksson, "Scaling of digital two-port filters realized in direct form," Proc. 1980 European Conf. on Circuit Theory and Design, ECCTD'80, Warsaw, Poland, Vol. 2, pp. 515-520, 2-5 Sept. 1980.

L. Wanhammar, "Implementation of Wave Digital Lattice Filters," Proc. 1980 European Conf. on Circuits Theory and Design, Warsaw, Poland, Sept. 2-5 1980.

L. Wanhammar, "Implementation of Wave Digital Filters Using Distributed Arithmetic," Signal Processing, Vol. 2, No. 3, pp. 253-260, July 1980.

T. Fjällbrant, and S. Eriksson (Invited paper): "A time-shared resistor concept applied to active -RC and -SC integrator filters derived from flow graph representations of passive counterparts," Proc. IEEE Int. Symp. Circuits Syst., ISCAS'80, Houston, Texas, April 1980, pp. 79-82.

B. Sikström: "An Approach to the Hardware Implementation of Wave Digital Filters," Signal Processing, Vol. 1, No. 4, pp. 259-263, Oct. 1979.

L. Wanhammar, "Implementation of Wave Digital Filters with Distributed Arithmetic," Proc. 4th Intern. Symp. on Network Theory, Ljubljana, Yugoslavia, pp. 385-397, Sept. 4-7, 1979.

B. Sikström: "An Approach to the Implementation of Wave Digital Filters," Proc. 4th Intern. Symp. on Network Theory, Ljubljana, Yugoslavia, pp. 379-384, Sept. 4-7, 1979.

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